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| author | Andreas Sandberg <andreas.sandberg@arm.com> | 2016-12-19 16:25:37 +0000 |
|---|---|---|
| committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2016-12-19 16:25:37 +0000 |
| commit | ac8e73565a244257f233cecfe936caf043af18fe (patch) | |
| tree | c3bd30971eebafee7d4339f557cb6d9d319c84f1 | |
| parent | b9c7b8190c27ad161689934fa780859860cfd74f (diff) | |
| download | gem5-ac8e73565a244257f233cecfe936caf043af18fe.tar.xz | |
sim: Remove redundant buildEnv import
Change-Id: Id6bdbc0c988aa92b96e292cabc913e6b974f14bb
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Curtis Dunham <curtis.dunham@arm.com>
| -rw-r--r-- | configs/common/Caches.py | 1 | ||||
| -rw-r--r-- | src/sim/Root.py | 1 | ||||
| -rw-r--r-- | src/sim/System.py | 1 |
3 files changed, 1 insertions, 2 deletions
diff --git a/configs/common/Caches.py b/configs/common/Caches.py index acaa0024e..926a41d07 100644 --- a/configs/common/Caches.py +++ b/configs/common/Caches.py @@ -38,6 +38,7 @@ # # Authors: Lisa Hsu +from m5.defines import buildEnv from m5.objects import * # Base implementations of L1, L2, IO and TLB-walker caches. There are diff --git a/src/sim/Root.py b/src/sim/Root.py index 776222b9c..e754a764c 100644 --- a/src/sim/Root.py +++ b/src/sim/Root.py @@ -29,7 +29,6 @@ # Authors: Nathan Binkert from m5.SimObject import SimObject -from m5.defines import buildEnv from m5.params import * from m5.util import fatal diff --git a/src/sim/System.py b/src/sim/System.py index 0d0251646..8ebf7a024 100644 --- a/src/sim/System.py +++ b/src/sim/System.py @@ -29,7 +29,6 @@ # Rick Strong from m5.SimObject import SimObject -from m5.defines import buildEnv from m5.params import * from m5.proxy import * |