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authorGabe Black <gblack@eecs.umich.edu>2009-02-25 10:21:21 -0800
committerGabe Black <gblack@eecs.umich.edu>2009-02-25 10:21:21 -0800
commitbda7077c6408542f0a1d766019b91a0c8eb2147b (patch)
tree325cdca638d3663bc7d56fc4bd5504c173c15707
parente08d60389d8ddbe64d22834dbd327229822dac10 (diff)
downloadgem5-bda7077c6408542f0a1d766019b91a0c8eb2147b.tar.xz
X86: Add segmentation checks for ldt related descriptors and selectors.
-rw-r--r--src/arch/x86/isa/microasm.isa2
-rw-r--r--src/arch/x86/isa/microops/regop.isa14
2 files changed, 14 insertions, 2 deletions
diff --git a/src/arch/x86/isa/microasm.isa b/src/arch/x86/isa/microasm.isa
index 00baed768..c7c6dae2e 100644
--- a/src/arch/x86/isa/microasm.isa
+++ b/src/arch/x86/isa/microasm.isa
@@ -87,7 +87,7 @@ let {{
# Add in symbols for the various checks of segment selectors.
for check in ("NoCheck", "CSCheck", "CallGateCheck", "IntGateCheck",
"SoftIntGateCheck", "SSCheck", "IretCheck", "IntCSCheck",
- "TRCheck", "TSSCheck"):
+ "TRCheck", "TSSCheck", "InGDTCheck", "LDTCheck"):
assembler.symbols[check] = "Seg%s" % check
for reg in ("TR", "IDTR"):
diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa
index d5eb59f11..f9bc82119 100644
--- a/src/arch/x86/isa/microops/regop.isa
+++ b/src/arch/x86/isa/microops/regop.isa
@@ -235,7 +235,7 @@ output header {{
enum SegmentSelectorCheck {
SegNoCheck, SegCSCheck, SegCallGateCheck, SegIntGateCheck,
SegSoftIntGateCheck, SegSSCheck, SegIretCheck, SegIntCSCheck,
- SegTRCheck, SegTSSCheck
+ SegTRCheck, SegTSSCheck, SegInGDTCheck, SegLDTCheck
};
enum LongModeDescriptorType {
@@ -1174,6 +1174,18 @@ let {{
fault = new GeneralProtection(selector);
}
break;
+ case SegInGDTCheck:
+ if (selector.ti) {
+ fault = new GeneralProtection(selector);
+ }
+ break;
+ case SegLDTCheck:
+ if (!desc.p) {
+ fault = new SegmentNotPresent(selector);
+ } else if (desc.type != 0x2) {
+ fault = new GeneralProtection(selector);
+ }
+ break;
default:
panic("Undefined segment check type.\\n");
}