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authorNathan Binkert <nate@binkert.org>2009-02-10 22:19:27 -0800
committerNathan Binkert <nate@binkert.org>2009-02-10 22:19:27 -0800
commitf255957b902e8d7c0a274d8a2f5afe326a813be8 (patch)
tree6d63d8b930e9dc7a746ecbad8f64c44b875ac6f2
parentcf4a00ca410226d3fd1b4db816938b7ddf78a333 (diff)
downloadgem5-f255957b902e8d7c0a274d8a2f5afe326a813be8.tar.xz
style
-rw-r--r--src/cpu/static_inst.cc43
-rw-r--r--src/cpu/static_inst.hh67
2 files changed, 63 insertions, 47 deletions
diff --git a/src/cpu/static_inst.cc b/src/cpu/static_inst.cc
index 52a7ede03..01136bda1 100644
--- a/src/cpu/static_inst.cc
+++ b/src/cpu/static_inst.cc
@@ -40,11 +40,17 @@ StaticInst::DecodeCache StaticInst::decodeCache;
StaticInst::AddrDecodeCache StaticInst::addrDecodeCache;
StaticInst::cacheElement StaticInst::recentDecodes[2];
+using namespace std;
+
+StaticInst::~StaticInst()
+{
+ if (cachedDisassembly)
+ delete cachedDisassembly;
+}
+
void
StaticInst::dumpDecodeCacheStats()
{
- using namespace std;
-
cerr << "Decode hash table stats @ " << curTick << ":" << endl;
cerr << "\tnum entries = " << decodeCache.size() << endl;
cerr << "\tnum buckets = " << decodeCache.bucket_count() << endl;
@@ -81,6 +87,37 @@ StaticInstPtr
StaticInst::fetchMicroop(MicroPC micropc)
{
panic("StaticInst::fetchMicroop() called on instruction "
- "that is not microcoded.");
+ "that is not microcoded.");
}
+Addr
+StaticInst::branchTarget(Addr branchPC) const
+{
+ panic("StaticInst::branchTarget() called on instruction "
+ "that is not a PC-relative branch.");
+ M5_DUMMY_RETURN;
+}
+
+Addr
+StaticInst::branchTarget(ThreadContext *tc) const
+{
+ panic("StaticInst::branchTarget() called on instruction "
+ "that is not an indirect branch.");
+ M5_DUMMY_RETURN;
+}
+
+Request::Flags
+StaticInst::memAccFlags()
+{
+ panic("StaticInst::memAccFlags called on non-memory instruction");
+ return 0;
+}
+
+const string &
+StaticInst::disassemble(Addr pc, const SymbolTable *symtab) const
+{
+ if (!cachedDisassembly)
+ cachedDisassembly = new string(generateDisassembly(pc, symtab));
+
+ return *cachedDisassembly;
+}
diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh
index f28b53ccf..bf07e06c7 100644
--- a/src/cpu/static_inst.hh
+++ b/src/cpu/static_inst.hh
@@ -382,12 +382,7 @@ class StaticInst : public StaticInstBase
{ }
public:
-
- virtual ~StaticInst()
- {
- if (cachedDisassembly)
- delete cachedDisassembly;
- }
+ virtual ~StaticInst();
/**
* The execute() signatures are auto-generated by scons based on the
@@ -406,12 +401,7 @@ class StaticInst : public StaticInstBase
* Invalid if not a PC-relative branch (i.e. isDirectCtrl()
* should be true).
*/
- virtual Addr branchTarget(Addr branchPC) const
- {
- panic("StaticInst::branchTarget() called on instruction "
- "that is not a PC-relative branch.");
- M5_DUMMY_RETURN
- }
+ virtual Addr branchTarget(Addr branchPC) const;
/**
* Return the target address for an indirect branch (jump). The
@@ -420,12 +410,7 @@ class StaticInst : public StaticInstBase
* execute the branch in question. Invalid if not an indirect
* branch (i.e. isIndirectCtrl() should be true).
*/
- virtual Addr branchTarget(ThreadContext *tc) const
- {
- panic("StaticInst::branchTarget() called on instruction "
- "that is not an indirect branch.");
- M5_DUMMY_RETURN
- }
+ virtual Addr branchTarget(ThreadContext *tc) const;
/**
* Return true if the instruction is a control transfer, and if so,
@@ -433,11 +418,7 @@ class StaticInst : public StaticInstBase
*/
bool hasBranchTarget(Addr pc, ThreadContext *tc, Addr &tgt) const;
- virtual Request::Flags memAccFlags()
- {
- panic("StaticInst::memAccFlags called on non-memory instruction");
- return 0;
- };
+ virtual Request::Flags memAccFlags();
/**
* Return string representation of disassembled instruction.
@@ -447,14 +428,7 @@ class StaticInst : public StaticInstBase
* should not be cached, this function should be overridden directly.
*/
virtual const std::string &disassemble(Addr pc,
- const SymbolTable *symtab = 0) const
- {
- if (!cachedDisassembly)
- cachedDisassembly =
- new std::string(generateDisassembly(pc, symtab));
-
- return *cachedDisassembly;
- }
+ const SymbolTable *symtab = 0) const;
/// Decoded instruction cache type.
/// For now we're using a generic hash_map; this seems to work
@@ -486,13 +460,13 @@ class StaticInst : public StaticInstBase
/// A cache of decoded instruction objects from addresses.
static AddrDecodeCache addrDecodeCache;
- struct cacheElement {
+ struct cacheElement
+ {
Addr page_addr;
AddrDecodePage *decodePage;
- cacheElement()
- :decodePage(NULL) { }
- } ;
+ cacheElement() : decodePage(NULL) { }
+ };
/// An array of recently decoded instructions.
// might not use an array if there is only two elements
@@ -521,7 +495,7 @@ class StaticInst : public StaticInstBase
/// @retval A pointer to the corresponding StaticInst object.
//This is defined as inlined below.
static StaticInstPtr searchCache(ExtMachInst mach_inst, Addr addr,
- AddrDecodePage * decodePage);
+ AddrDecodePage *decodePage);
};
typedef RefCountingPtr<StaticInstBase> StaticInstBasePtr;
@@ -575,7 +549,8 @@ class AddrDecodePage
public:
/// Constructor
- AddrDecodePage() {
+ AddrDecodePage()
+ {
lowerMask = TheISA::PageBytes - 1;
memset(valid, 0, TheISA::PageBytes);
}
@@ -585,7 +560,8 @@ class AddrDecodePage
/// related to the address
/// @param mach_inst The binary instruction to check
/// @param addr The address containing the instruction
- inline bool decoded(ExtMachInst mach_inst, Addr addr)
+ bool
+ decoded(ExtMachInst mach_inst, Addr addr)
{
return (valid[addr & lowerMask] &&
(instructions[addr & lowerMask]->machInst == mach_inst));
@@ -595,19 +571,22 @@ class AddrDecodePage
/// to check if the instruction is valid.
/// @param addr The address of the instruction.
/// @retval A pointer to the corresponding StaticInst object.
- inline StaticInstPtr getInst(Addr addr)
- { return instructions[addr & lowerMask]; }
+ StaticInstPtr
+ getInst(Addr addr)
+ {
+ return instructions[addr & lowerMask];
+ }
/// Inserts a pointer to a StaticInst object into the list of decoded
/// instructions on the page.
/// @param addr The address of the instruction.
/// @param si A pointer to the corresponding StaticInst object.
- inline void insert(Addr addr, StaticInstPtr &si)
+ void
+ insert(Addr addr, StaticInstPtr &si)
{
instructions[addr & lowerMask] = si;
valid[addr & lowerMask] = true;
}
-
};
@@ -656,7 +635,7 @@ StaticInst::decode(StaticInst::ExtMachInst mach_inst, Addr addr)
}
// creates a new object for a page of decoded instructions
- AddrDecodePage * decodePage = new AddrDecodePage;
+ AddrDecodePage *decodePage = new AddrDecodePage;
addrDecodeCache[page_addr] = decodePage;
updateCache(page_addr, decodePage);
return searchCache(mach_inst, addr, decodePage);
@@ -664,7 +643,7 @@ StaticInst::decode(StaticInst::ExtMachInst mach_inst, Addr addr)
inline StaticInstPtr
StaticInst::searchCache(ExtMachInst mach_inst, Addr addr,
- AddrDecodePage * decodePage)
+ AddrDecodePage *decodePage)
{
DecodeCache::iterator iter = decodeCache.find(mach_inst);
if (iter != decodeCache.end()) {