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| author | Gabe Black <gblack@eecs.umich.edu> | 2011-03-02 00:41:44 -0800 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2011-03-02 00:41:44 -0800 |
| commit | 07b507d2785f9d7696f980d6556e362392f92fda (patch) | |
| tree | da9a7b4c46a16c67e0c8690d3e8d956d0b24e48e | |
| parent | 8966312785e30272de6f7453e7662a7bb05bc331 (diff) | |
| download | gem5-07b507d2785f9d7696f980d6556e362392f92fda.tar.xz | |
X86: Use the npc as the pc when doing a nativetrace, not what M5 considers the pc.
| -rw-r--r-- | src/arch/x86/nativetrace.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/nativetrace.cc b/src/arch/x86/nativetrace.cc index 1999f6611..d1d75387d 100644 --- a/src/arch/x86/nativetrace.cc +++ b/src/arch/x86/nativetrace.cc @@ -85,7 +85,7 @@ X86NativeTrace::ThreadState::update(ThreadContext *tc) r13 = tc->readIntReg(X86ISA::INTREG_R13); r14 = tc->readIntReg(X86ISA::INTREG_R14); r15 = tc->readIntReg(X86ISA::INTREG_R15); - rip = tc->pcState().pc(); + rip = tc->pcState().npc(); //This should be expanded if x87 registers are considered for (int i = 0; i < 8; i++) mmx[i] = tc->readFloatRegBits(X86ISA::FLOATREG_MMX(i)); |