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| author | Gabe Black <gabeblack@google.com> | 2017-04-04 02:04:37 -0700 |
|---|---|---|
| committer | Gabe Black <gabeblack@google.com> | 2017-04-05 18:35:13 +0000 |
| commit | 7fbe733d18d3e7340102d42cb00e4d421bf52fa0 (patch) | |
| tree | 7d70bc4cabd166703ad8d36ef46a3d1b5a7e9471 | |
| parent | d3f5d5a107e57c16c72ccfa8e956ffb7357f8029 (diff) | |
| download | gem5-7fbe733d18d3e7340102d42cb00e4d421bf52fa0.tar.xz | |
stats: Update SPARC solaris boot stats.
The CPU power state bins where changed by the following
CL:
commit fb5fc11da49938660ea22c336964677cdba890e1
Author: David Guillen Fandos <david.guillen@arm.com>
Date: Mon Jun 6 17:16:43 2016 +0100
pwr: Low-power idle power state for idle CPUs
Change-Id: I8b3924681c8a85b7bbe061b671faf274ce882f91
Reviewed-on: https://gem5-review.googlesource.com/2644
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
3 files changed, 9 insertions, 8 deletions
diff --git a/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simerr b/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simerr index 2807da6d7..7e4b3848e 100755 --- a/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simerr +++ b/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simerr @@ -36,4 +36,5 @@ warn: rounding error > tolerance 0.145519 rounded to 0 warn: Sockets disabled, not accepting terminal connections warn: Sockets disabled, not accepting gdb connections +warn: ClockedObject: More than one power state change request encountered within the same simulation tick warn: Don't know what interrupt to clear for console. diff --git a/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout b/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout index 1b486a6d7..a8b9bd25d 100755 --- a/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout +++ b/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout @@ -3,9 +3,9 @@ Redirecting stderr to build/SPARC/tests/opt/long/fs/80.solaris-boot/sparc/solari gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Apr 4 2017 01:06:08 -gem5 started Apr 4 2017 01:06:18 -gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 98195 +gem5 compiled Apr 4 2017 01:51:46 +gem5 started Apr 4 2017 01:51:57 +gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 121003 command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/SPARC/gem5.opt -d build/SPARC/tests/opt/long/fs/80.solaris-boot/sparc/solaris/t1000-simple-atomic -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py long/fs/80.solaris-boot/sparc/solaris/t1000-simple-atomic Global frequency set at 2000000000 ticks per second diff --git a/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt b/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt index a382e7a43..9861ba8f3 100644 --- a/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt +++ b/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt @@ -4,11 +4,11 @@ sim_seconds 2.233778 # Nu sim_ticks 4467555024 # Number of ticks simulated final_tick 4467555024 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 2000000000 # Frequency of simulated ticks -host_inst_rate 3288883 # Simulator instruction rate (inst/s) -host_op_rate 3290176 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 6593981 # Simulator tick rate (ticks/s) +host_inst_rate 3232456 # Simulator instruction rate (inst/s) +host_op_rate 3233727 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 6480848 # Simulator tick rate (ticks/s) host_mem_usage 550344 # Number of bytes of host memory used -host_seconds 677.52 # Real time elapsed on the host +host_seconds 689.35 # Real time elapsed on the host sim_insts 2228284650 # Number of instructions simulated sim_ops 2229160714 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -116,7 +116,7 @@ system.rom.bw_total::total 505282 # To system.pwrStateResidencyTicks::UNDEFINED 4467555024 # Cumulative time (in ticks) in various power states system.bridge.pwrStateResidencyTicks::UNDEFINED 4467555024 # Cumulative time (in ticks) in various power states system.cpu_clk_domain.clock 2 # Clock period in ticks -system.cpu.pwrStateResidencyTicks::UNDEFINED 4467555024 # Cumulative time (in ticks) in various power states +system.cpu.pwrStateResidencyTicks::ON 4467555024 # Cumulative time (in ticks) in various power states system.cpu.numCycles 2233777513 # number of cpu cycles simulated system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed |