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authorGabe Black <gblack@eecs.umich.edu>2006-02-27 04:02:45 -0500
committerGabe Black <gblack@eecs.umich.edu>2006-02-27 04:02:45 -0500
commit07cd7e966e6ee6715345b2f6ed2d4ea849fc7a36 (patch)
tree0fc532ca76620495d20eeb4fd416176acf4954d9
parentf9c2b9e74fc459dc221035cb98e2a2e6a1540f9f (diff)
downloadgem5-07cd7e966e6ee6715345b2f6ed2d4ea849fc7a36.tar.xz
Added isMachineCheckFault and isAlignmentFault virtual functions to the fault base class, and replaced the isA templated function with them where appropriate.
arch/alpha/ev5.cc: cpu/simple/cpu.cc: Changed from the isA templated function to isMachineCheckFault and isAlignmentFault sim/faults.hh: Added isMachineCheckFault and isAlignmentFault virtual functions to the fault base class. --HG-- extra : convert_revision : 3bf3a4369bc24a039648ee4f2a9c1663362ff2e2
-rw-r--r--arch/alpha/ev5.cc4
-rw-r--r--cpu/simple/cpu.cc4
-rw-r--r--sim/faults.hh12
3 files changed, 15 insertions, 5 deletions
diff --git a/arch/alpha/ev5.cc b/arch/alpha/ev5.cc
index 34b328a39..b89a6d10d 100644
--- a/arch/alpha/ev5.cc
+++ b/arch/alpha/ev5.cc
@@ -92,8 +92,8 @@ AlphaISA::fault_addr(Fault fault)
{
//Check for the system wide faults
if(fault == NoFault) return 0x0000;
- else if(fault->isA<MachineCheckFault>()) return 0x0401;
- else if(fault->isA<AlignmentFault>()) return 0x0301;
+ else if(fault->isMachineCheckFault()) return 0x0401;
+ else if(fault->isAlignmentFault()) return 0x0301;
//Deal with the alpha specific faults
return ((AlphaFault *)(fault.get()))->vect();
};
diff --git a/cpu/simple/cpu.cc b/cpu/simple/cpu.cc
index a0a37f45a..4693c78c9 100644
--- a/cpu/simple/cpu.cc
+++ b/cpu/simple/cpu.cc
@@ -347,7 +347,7 @@ SimpleCPU::copySrcTranslate(Addr src)
// translate to physical address
Fault fault = xc->translateDataReadReq(memReq);
- assert(!fault->isA<AlignmentFault>());
+ assert(!fault->isAlignmentFault());
if (fault == NoFault) {
xc->copySrcAddr = src;
@@ -382,7 +382,7 @@ SimpleCPU::copy(Addr dest)
// translate to physical address
Fault fault = xc->translateDataWriteReq(memReq);
- assert(!fault->isA<AlignmentFault>());
+ assert(!fault->isAlignmentFault());
if (fault == NoFault) {
Addr dest_addr = memReq->paddr + offset;
diff --git a/sim/faults.hh b/sim/faults.hh
index ea2e21a7d..e4880f820 100644
--- a/sim/faults.hh
+++ b/sim/faults.hh
@@ -55,9 +55,17 @@ class FaultBase : public RefCounted
virtual FaultStat & stat() = 0;
template<typename T>
bool isA() {return dynamic_cast<T *>(this);}
+ virtual bool isMachineCheckFault() {return false;}
+ virtual bool isAlignmentFault() {return false;}
};
-static FaultBase * const NoFault __attribute__ ((unused)) = 0;
+FaultBase * const NoFault = 0;
+
+//The ISAs are each responsible for providing a genMachineCheckFault and a
+//genAlignmentFault functions, which return faults to use in the case of a
+//machine check fault or an alignment fault, respectively. Base classes which
+//provide the name() function, and the isMachineCheckFault and isAlignmentFault
+//functions are provided below.
class MachineCheckFault : public FaultBase
{
@@ -67,6 +75,7 @@ class MachineCheckFault : public FaultBase
public:
FaultName name() {return _name;}
FaultStat & stat() {return _stat;}
+ bool isMachineCheckFault() {return true;}
};
class AlignmentFault : public FaultBase
@@ -77,6 +86,7 @@ class AlignmentFault : public FaultBase
public:
FaultName name() {return _name;}
FaultStat & stat() {return _stat;}
+ bool isAlignmentFault() {return true;}
};