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authorTony Gutierrez <anthony.gutierrez@amd.com>2016-10-26 22:47:01 -0400
committerTony Gutierrez <anthony.gutierrez@amd.com>2016-10-26 22:47:01 -0400
commit0a6cdff1760572bfa3cf9dffaa4a0df9fb4ae6a4 (patch)
tree10f143a01235d41e898ab03383a3b188e28be3e6
parentc7d4afd878ac37ff7d1b72628e98d6337f0a4441 (diff)
downloadgem5-0a6cdff1760572bfa3cf9dffaa4a0df9fb4ae6a4.tar.xz
gpu-compute, arch: add some methods to the base inst classes for ISA support
-rw-r--r--src/arch/hsail/insts/gpu_static_inst.hh1
-rw-r--r--src/gpu-compute/gpu_static_inst.hh9
2 files changed, 10 insertions, 0 deletions
diff --git a/src/arch/hsail/insts/gpu_static_inst.hh b/src/arch/hsail/insts/gpu_static_inst.hh
index 29aab1f70..6a5ad5003 100644
--- a/src/arch/hsail/insts/gpu_static_inst.hh
+++ b/src/arch/hsail/insts/gpu_static_inst.hh
@@ -56,6 +56,7 @@ namespace HsailISA
void generateDisassembly();
const std::string &disassemble();
uint32_t instSize() { return 4; }
+ bool isValid() const override { return true; }
protected:
HsailCode *hsailCode;
diff --git a/src/gpu-compute/gpu_static_inst.hh b/src/gpu-compute/gpu_static_inst.hh
index c1de28427..447e1efa3 100644
--- a/src/gpu-compute/gpu_static_inst.hh
+++ b/src/gpu-compute/gpu_static_inst.hh
@@ -84,6 +84,8 @@ class GPUStaticInst
virtual int numDstRegOperands() = 0;
virtual int numSrcRegOperands() = 0;
+ virtual bool isValid() const = 0;
+
/*
* Most instructions (including all HSAIL instructions)
* are vector ops, so _scalarOp will be false by default.
@@ -109,6 +111,13 @@ class GPUStaticInst
fatal("calling initiateAcc() on a non-memory instruction.\n");
}
+ // only used for memory instructions
+ virtual void
+ completeAcc(GPUDynInstPtr gpuDynInst)
+ {
+ fatal("calling completeAcc() on a non-memory instruction.\n");
+ }
+
virtual uint32_t getTargetPc() { return 0; }
/**