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author | Erik Hallnor <ehallnor@umich.edu> | 2003-10-20 00:46:02 -0400 |
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committer | Erik Hallnor <ehallnor@umich.edu> | 2003-10-20 00:46:02 -0400 |
commit | 2c7a0b87f5b9eadaa1a0d5648804cd7e187bfd3f (patch) | |
tree | 7adc694e5322129e0bd711a6823e1db0cff9fca2 | |
parent | 789a2de6f88a737c50f70e50d486b55ff0a36e1b (diff) | |
download | gem5-2c7a0b87f5b9eadaa1a0d5648804cd7e187bfd3f.tar.xz |
simple_cpu.cc:
Add data to static memReq and make everything use it.
Add init of numLoads.
cpu/simple_cpu/simple_cpu.cc:
Add data to static memReq and make everything use it.
Add init of numLoads.
--HG--
extra : convert_revision : 47d98aae643c64dff4e5cf1dc770a36434122579
-rw-r--r-- | cpu/simple_cpu/simple_cpu.cc | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc index 28009b7f0..20790bfb6 100644 --- a/cpu/simple_cpu/simple_cpu.cc +++ b/cpu/simple_cpu/simple_cpu.cc @@ -192,8 +192,10 @@ SimpleCPU::SimpleCPU(const string &_name, Process *_process, memReq = new MemReq(); memReq->xc = xc; memReq->asid = 0; + memReq->data = new uint8_t[64]; numInst = 0; + numLoad = 0; last_idle = 0; lastIcacheStall = 0; lastDcacheStall = 0; @@ -406,7 +408,7 @@ SimpleCPU::write(T data, Addr addr, unsigned flags, uint64_t *res) if (fault == No_Fault && dcacheInterface) { memReq->cmd = Write; - memReq->data = (uint8_t *)&data; + memcpy(memReq->data,(uint8_t *)&data,memReq->size); memReq->completionEvent = NULL; memReq->time = curTick; memReq->flags &= ~UNCACHEABLE; |