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author | Lisa Hsu <hsul@eecs.umich.edu> | 2006-10-26 16:04:27 -0400 |
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committer | Lisa Hsu <hsul@eecs.umich.edu> | 2006-10-26 16:04:27 -0400 |
commit | 2f30c2b4c982b61b393a2888c022fbeac3225d59 (patch) | |
tree | 62b4c3c1c447e8dabe7b21eb097258c01fba7988 | |
parent | d626a32c5298dcb4a9656065ae68213087203627 (diff) | |
parent | 260b3c0cf074bddb4dff8a126811ea9c4c2d6687 (diff) | |
download | gem5-2f30c2b4c982b61b393a2888c022fbeac3225d59.tar.xz |
Merge zizzer:/bk/newmem
into zed.eecs.umich.edu:/z/hsul/work/m5/clean
--HG--
extra : convert_revision : cb3f718bdcbd52540747a2696fb37bb4fcfe27a3
-rw-r--r-- | configs/example/se.py | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/configs/example/se.py b/configs/example/se.py index 2e63e27da..c4150eed7 100644 --- a/configs/example/se.py +++ b/configs/example/se.py @@ -129,14 +129,15 @@ cpu.cpu_id = 0 system = System(cpu = cpu, physmem = PhysicalMemory(range=AddrRange("512MB")), membus = Bus()) -system.physmem.port = system.membus.port -system.cpu.connectMemPorts(system.membus) -system.cpu.mem = system.physmem -system.cpu.clock = '2GHz' + if options.caches and not options.standard_switch: system.cpu.addPrivateSplitL1Caches(MyCache(size = '32kB'), MyCache(size = '64kB')) +system.physmem.port = system.membus.port +system.cpu.connectMemPorts(system.membus) +system.cpu.mem = system.physmem +system.cpu.clock = '2GHz' root = Root(system = system) if options.timing or options.detailed: @@ -169,7 +170,7 @@ m5.instantiate(root) if options.checkpoint_dir: cptdir = options.checkpoint_dir else: - cptdir = getcwd() + cptdir = os.getcwd() if options.checkpoint_restore: from os.path import isdir |