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author | Nilay Vaish <nilay@cs.wisc.edu> | 2015-08-03 22:44:27 -0500 |
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committer | Nilay Vaish <nilay@cs.wisc.edu> | 2015-08-03 22:44:27 -0500 |
commit | 3d782f8df7450af529d30c0488a5c12e0701dbed (patch) | |
tree | 474d173f405d39466615f06fc509739a77664fe6 | |
parent | 03f2b8c23de9e8efa5eae28ff0f9397b7ea79486 (diff) | |
download | gem5-3d782f8df7450af529d30c0488a5c12e0701dbed.tar.xz |
ruby: correctly number the sequencer in MESI_Three_Level.py
-rw-r--r-- | configs/ruby/MESI_Three_Level.py | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/configs/ruby/MESI_Three_Level.py b/configs/ruby/MESI_Three_Level.py index 60001864c..a4074e842 100644 --- a/configs/ruby/MESI_Three_Level.py +++ b/configs/ruby/MESI_Three_Level.py @@ -108,7 +108,8 @@ def create_system(options, full_system, system, dma_ports, ruby_system): clk_domain=system.cpu[i].clk_domain, ruby_system = ruby_system) - cpu_seq = RubySequencer(version = i, icache = l0i_cache, + cpu_seq = RubySequencer(version = i * num_cpus_per_cluster + j, + icache = l0i_cache, clk_domain=system.cpu[i].clk_domain, dcache = l0d_cache, ruby_system = ruby_system) |