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| author | Gabe Black <gblack@eecs.umich.edu> | 2006-10-18 20:53:59 -0400 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2006-10-18 20:53:59 -0400 |
| commit | 54c9701a257656cf07d1f2ca93f5c5d558f878f9 (patch) | |
| tree | fe4bd6027b89890b3340766c89aab85cff47de7b | |
| parent | bb2ab310ebe6b9f9313c9af103312d2b99e09574 (diff) | |
| download | gem5-54c9701a257656cf07d1f2ca93f5c5d558f878f9.tar.xz | |
Zeroed out the actual LSB in addition to moving it's original value the MSB.
--HG--
extra : convert_revision : d29efe01781d72ee6e61818e7b93972262c0616b
| -rw-r--r-- | src/arch/sparc/isa/operands.isa | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/sparc/isa/operands.isa b/src/arch/sparc/isa/operands.isa index 9dcd73598..40926a5fb 100644 --- a/src/arch/sparc/isa/operands.isa +++ b/src/arch/sparc/isa/operands.isa @@ -48,7 +48,7 @@ output header {{ // MSB put in the LSB position but are otherwise normal. static inline unsigned int dfpr(unsigned int regNum) { - return regNum | ((regNum & 1) << 5); + return (regNum & (~1)) | ((regNum & 1) << 5); } }}; |