stats: Fixing regStats function for some SimObjects

Fixing an issue with regStats not calling the parent class method
for most SimObjects in Gem5. This causes issues if one adds new
stats in the base class (since they are never initialized properly!).

Change-Id: Iebc5aa66f58816ef4295dc8e48a357558d76a77c
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>

30 files changed, 58 insertions, 12 deletions

diff --git a/src/arch/alpha/tlb.cc b/src/arch/alpha/tlb.cc
index 3360b34c5..fcd2b518b 100644
--- a/src/arch/alpha/tlb.cc
+++ b/src/arch/alpha/tlb.cc
@@ -76,6 +76,8 @@ TLB::~TLB()
 void
 TLB::regStats()
 {
+    BaseTLB::regStats();
+
     fetch_hits
         .name(name() + ".fetch_hits")
         .desc("ITB hits");
diff --git a/src/arch/mips/tlb.cc b/src/arch/mips/tlb.cc
index d2aa5ad70..340c83021 100644
--- a/src/arch/mips/tlb.cc
+++ b/src/arch/mips/tlb.cc
@@ -226,6 +226,8 @@ TLB::unserialize(CheckpointIn &cp)
 void
 TLB::regStats()
 {
+    BaseTLB::regStats();
+
     read_hits
         .name(name() + ".read_hits")
         .desc("DTB read hits")
diff --git a/src/arch/power/tlb.cc b/src/arch/power/tlb.cc
index edfb4f453..90a341d85 100644
--- a/src/arch/power/tlb.cc
+++ b/src/arch/power/tlb.cc
@@ -223,6 +223,8 @@ TLB::unserialize(CheckpointIn &cp)
 void
 TLB::regStats()
 {
+    BaseTLB::regStats();
+
     read_hits
         .name(name() + ".read_hits")
         .desc("DTB read hits")
diff --git a/src/cpu/o3/probe/elastic_trace.cc b/src/cpu/o3/probe/elastic_trace.cc
index 3332816ca..bf6b6f002 100644
--- a/src/cpu/o3/probe/elastic_trace.cc
+++ b/src/cpu/o3/probe/elastic_trace.cc
@@ -870,6 +870,8 @@ ElasticTrace::writeDepTrace(uint32_t num_to_write)
 
 void
 ElasticTrace::regStats() {
+    ProbeListenerObject::regStats();
+
     using namespace Stats;
     numRegDep
         .name(name() + ".numRegDep")
diff --git a/src/cpu/pred/bpred_unit.cc b/src/cpu/pred/bpred_unit.cc
index 91e43f50e..523697ff6 100644
--- a/src/cpu/pred/bpred_unit.cc
+++ b/src/cpu/pred/bpred_unit.cc
@@ -80,6 +80,8 @@ BPredUnit::BPredUnit(const Params *params)
 void
 BPredUnit::regStats()
 {
+    SimObject::regStats();
+
     lookups
         .name(name() + ".lookups")
         .desc("Number of BP lookups")
diff --git a/src/cpu/testers/memtest/memtest.cc b/src/cpu/testers/memtest/memtest.cc
index 3e0d67c32..c2c721bcf 100644
--- a/src/cpu/testers/memtest/memtest.cc
+++ b/src/cpu/testers/memtest/memtest.cc
@@ -197,6 +197,8 @@ MemTest::completeRequest(PacketPtr pkt, bool functional)
 void
 MemTest::regStats()
 {
+    MemObject::regStats();
+
     using namespace Stats;
 
     numReadsStat
diff --git a/src/dev/arm/flash_device.cc b/src/dev/arm/flash_device.cc
index 112a94186..63d232e80 100644
--- a/src/dev/arm/flash_device.cc
+++ b/src/dev/arm/flash_device.cc
@@ -471,6 +471,8 @@ FlashDevice::getUnknownPages(uint32_t index)
 void
 FlashDevice::regStats()
 {
+    AbstractNVM::regStats();
+
     using namespace Stats;
 
     std::string fd_name = name() + ".FlashDevice";
diff --git a/src/dev/arm/hdlcd.cc b/src/dev/arm/hdlcd.cc
index b04de21bf..0f63f23fc 100644
--- a/src/dev/arm/hdlcd.cc
+++ b/src/dev/arm/hdlcd.cc
@@ -97,6 +97,8 @@ HDLcd::~HDLcd()
 void
 HDLcd::regStats()
 {
+    AmbaDmaDevice::regStats();
+
     using namespace Stats;
 
     stats.underruns
diff --git a/src/dev/arm/ufs_device.cc b/src/dev/arm/ufs_device.cc
index 07d50903b..fe05b3279 100644
--- a/src/dev/arm/ufs_device.cc
+++ b/src/dev/arm/ufs_device.cc
@@ -774,6 +774,8 @@ UFSHostDeviceParams::create()
 void
 UFSHostDevice::regStats()
 {
+    DmaDevice::regStats();
+
     using namespace Stats;
 
     std::string UFSHost_name = name() + ".UFSDiskHost";
diff --git a/src/gpu-compute/compute_unit.cc b/src/gpu-compute/compute_unit.cc
index 49029f815..b3a99b182 100644
--- a/src/gpu-compute/compute_unit.cc
+++ b/src/gpu-compute/compute_unit.cc
@@ -1447,6 +1447,8 @@ ComputeUnit::ITLBPort::recvReqRetry()
 void
 ComputeUnit::regStats()
 {
+    MemObject::regStats();
+
     tlbCycles
         .name(name() + ".tlb_cycles")
         .desc("total number of cycles for all uncoalesced requests")
diff --git a/src/gpu-compute/gpu_tlb.cc b/src/gpu-compute/gpu_tlb.cc
index 7a4f883f6..2021af9a9 100644
--- a/src/gpu-compute/gpu_tlb.cc
+++ b/src/gpu-compute/gpu_tlb.cc
@@ -958,6 +958,8 @@ namespace X86ISA
     void
     GpuTLB::regStats()
     {
+        MemObject::regStats();
+
         localNumTLBAccesses
             .name(name() + ".local_TLB_accesses")
             .desc("Number of TLB accesses")
diff --git a/src/gpu-compute/lds_state.cc b/src/gpu-compute/lds_state.cc
index 91ee8009a..d4a27318a 100644
--- a/src/gpu-compute/lds_state.cc
+++ b/src/gpu-compute/lds_state.cc
@@ -331,11 +331,3 @@ LdsState::TickEvent::process()
 {
     ldsState->process();
 }
-
-/**
- *
- */
-void
-LdsState::regStats()
-{
-}
diff --git a/src/gpu-compute/lds_state.hh b/src/gpu-compute/lds_state.hh
index 89f08a1d3..58d109493 100644
--- a/src/gpu-compute/lds_state.hh
+++ b/src/gpu-compute/lds_state.hh
@@ -390,9 +390,6 @@ class LdsState: public MemObject
     void
     setParent(ComputeUnit *x_parent);
 
-    void
-    regStats();
-
     // accessors
     ComputeUnit *
     getParent() const
diff --git a/src/gpu-compute/tlb_coalescer.cc b/src/gpu-compute/tlb_coalescer.cc
index 835d7b740..c9b888d5f 100644
--- a/src/gpu-compute/tlb_coalescer.cc
+++ b/src/gpu-compute/tlb_coalescer.cc
@@ -546,6 +546,8 @@ TLBCoalescer::CleanupEvent::process()
 void
 TLBCoalescer::regStats()
 {
+    MemObject::regStats();
+
     uncoalescedAccesses
         .name(name() + ".uncoalesced_accesses")
         .desc("Number of uncoalesced TLB accesses")
diff --git a/src/gpu-compute/wavefront.cc b/src/gpu-compute/wavefront.cc
index ed13b22c7..7cdec53e5 100644
--- a/src/gpu-compute/wavefront.cc
+++ b/src/gpu-compute/wavefront.cc
@@ -88,6 +88,8 @@ Wavefront::Wavefront(const Params *p)
 void
 Wavefront::regStats()
 {
+    SimObject::regStats();
+
     srcRegOpDist
         .init(0, 4, 2)
         .name(name() + ".src_reg_operand_dist")
diff --git a/src/mem/probes/stack_dist.cc b/src/mem/probes/stack_dist.cc
index a447f49e5..b12c81e2c 100644
--- a/src/mem/probes/stack_dist.cc
+++ b/src/mem/probes/stack_dist.cc
@@ -57,6 +57,8 @@ StackDistProbe::StackDistProbe(StackDistProbeParams *p)
 void
 StackDistProbe::regStats()
 {
+    BaseMemProbe::regStats();
+
     const StackDistProbeParams *p(
         dynamic_cast<const StackDistProbeParams *>(params()));
     assert(p);
diff --git a/src/mem/ruby/network/garnet/BaseGarnetNetwork.cc b/src/mem/ruby/network/garnet/BaseGarnetNetwork.cc
index 1213073e9..2bd2acb9f 100644
--- a/src/mem/ruby/network/garnet/BaseGarnetNetwork.cc
+++ b/src/mem/ruby/network/garnet/BaseGarnetNetwork.cc
@@ -69,6 +69,8 @@ BaseGarnetNetwork::init()
 void
 BaseGarnetNetwork::regStats()
 {
+    Network::regStats();
+
     m_flits_received
         .init(m_virtual_networks)
         .name(name() + ".flits_received")
diff --git a/src/mem/ruby/network/garnet/fixed-pipeline/Router_d.cc b/src/mem/ruby/network/garnet/fixed-pipeline/Router_d.cc
index 97bc1abdd..dab9b7dda 100644
--- a/src/mem/ruby/network/garnet/fixed-pipeline/Router_d.cc
+++ b/src/mem/ruby/network/garnet/fixed-pipeline/Router_d.cc
@@ -158,6 +158,8 @@ Router_d::update_sw_winner(int inport, flit_d *t_flit)
 void
 Router_d::regStats()
 {
+    BasicRouter::regStats();
+
     m_buffer_reads
         .name(name() + ".buffer_reads")
         .flags(Stats::nozero)
diff --git a/src/mem/ruby/network/simple/SimpleNetwork.cc b/src/mem/ruby/network/simple/SimpleNetwork.cc
index 25d0b6f4b..2fc7b6440 100644
--- a/src/mem/ruby/network/simple/SimpleNetwork.cc
+++ b/src/mem/ruby/network/simple/SimpleNetwork.cc
@@ -132,6 +132,8 @@ SimpleNetwork::makeInternalLink(SwitchID src, SwitchID dest, BasicLink* link,
 void
 SimpleNetwork::regStats()
 {
+    Network::regStats();
+
     for (MessageSizeType type = MessageSizeType_FIRST;
          type < MessageSizeType_NUM; ++type) {
         m_msg_counts[(unsigned int) type]
diff --git a/src/mem/ruby/network/simple/Switch.cc b/src/mem/ruby/network/simple/Switch.cc
index 747884f16..78f5b609c 100644
--- a/src/mem/ruby/network/simple/Switch.cc
+++ b/src/mem/ruby/network/simple/Switch.cc
@@ -112,6 +112,8 @@ Switch::getThrottle(LinkID link_number) const
 void
 Switch::regStats()
 {
+    BasicRouter::regStats();
+
     for (int link = 0; link < m_throttles.size(); link++) {
         m_throttles[link]->regStats(name());
     }
diff --git a/src/mem/ruby/slicc_interface/AbstractController.cc b/src/mem/ruby/slicc_interface/AbstractController.cc
index 5d8b6eeea..b4576f87e 100644
--- a/src/mem/ruby/slicc_interface/AbstractController.cc
+++ b/src/mem/ruby/slicc_interface/AbstractController.cc
@@ -76,6 +76,8 @@ AbstractController::resetStats()
 void
 AbstractController::regStats()
 {
+    MemObject::regStats();
+
     m_fully_busy_cycles
         .name(name() + ".fully_busy_cycles")
         .desc("cycles for which number of transistions == max transitions")
diff --git a/src/mem/ruby/structures/CacheMemory.cc b/src/mem/ruby/structures/CacheMemory.cc
index f7c196119..36d109769 100644
--- a/src/mem/ruby/structures/CacheMemory.cc
+++ b/src/mem/ruby/structures/CacheMemory.cc
@@ -488,6 +488,8 @@ CacheMemory::isLocked(Addr address, int context)
 void
 CacheMemory::regStats()
 {
+    SimObject::regStats();
+
     m_demand_hits
         .name(name() + ".demand_hits")
         .desc("Number of cache demand hits")
diff --git a/src/mem/ruby/structures/Prefetcher.cc b/src/mem/ruby/structures/Prefetcher.cc
index ce6d36c04..eef51dcf7 100644
--- a/src/mem/ruby/structures/Prefetcher.cc
+++ b/src/mem/ruby/structures/Prefetcher.cc
@@ -86,6 +86,8 @@ Prefetcher::~Prefetcher()
 void
 Prefetcher::regStats()
 {
+    SimObject::regStats();
+
     numMissObserved
         .name(name() + ".miss_observed")
         .desc("number of misses observed")
diff --git a/src/mem/ruby/system/GPUCoalescer.cc b/src/mem/ruby/system/GPUCoalescer.cc
index 69f79187a..1c57f6c4d 100644
--- a/src/mem/ruby/system/GPUCoalescer.cc
+++ b/src/mem/ruby/system/GPUCoalescer.cc
@@ -1284,6 +1284,8 @@ GPUCoalescer::recordMissLatency(GPUCoalescerRequest* srequest,
 void
 GPUCoalescer::regStats()
 {
+    RubyPort::regStats();
+
     // These statistical variables are not for display.
     // The profiler will collate these across different
     // coalescers and display those collated statistics.
diff --git a/src/mem/ruby/system/RubySystem.hh b/src/mem/ruby/system/RubySystem.hh
index 62330e19d..8ebd3494a 100644
--- a/src/mem/ruby/system/RubySystem.hh
+++ b/src/mem/ruby/system/RubySystem.hh
@@ -89,7 +89,10 @@ class RubySystem : public ClockedObject
         return m_profiler;
     }
 
-    void regStats() override { m_profiler->regStats(name()); }
+    void regStats() override {
+        ClockedObject::regStats();
+        m_profiler->regStats(name());
+    }
     void collateStats() { m_profiler->collateStats(); }
     void resetStats() override;
 
diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc
index f1f6ddadb..cf3edb904 100644
--- a/src/mem/ruby/system/Sequencer.cc
+++ b/src/mem/ruby/system/Sequencer.cc
@@ -721,6 +721,8 @@ Sequencer::evictionCallback(Addr address)
 void
 Sequencer::regStats()
 {
+    RubyPort::regStats();
+
     m_store_waiting_on_load
         .name(name() + ".store_waiting_on_load")
         .desc("Number of times a store aliased with a pending load")
diff --git a/src/mem/snoop_filter.cc b/src/mem/snoop_filter.cc
index 9d02ed249..9e8f8afb8 100755
--- a/src/mem/snoop_filter.cc
+++ b/src/mem/snoop_filter.cc
@@ -351,6 +351,8 @@ SnoopFilter::updateResponse(const Packet* cpkt, const SlavePort& slave_port)
 void
 SnoopFilter::regStats()
 {
+    SimObject::regStats();
+
     totRequests
         .name(name() + ".tot_requests")
         .desc("Total number of requests made to the snoop filter.");
diff --git a/src/sim/clock_domain.cc b/src/sim/clock_domain.cc
index 1ccee7f1d..9865c4d11 100644
--- a/src/sim/clock_domain.cc
+++ b/src/sim/clock_domain.cc
@@ -56,6 +56,8 @@
 void
 ClockDomain::regStats()
 {
+    SimObject::regStats();
+
     using namespace Stats;
 
     // Expose the current clock period as a stat for observability in
diff --git a/src/sim/power/thermal_domain.cc b/src/sim/power/thermal_domain.cc
index 4b840670d..208c5bab4 100644
--- a/src/sim/power/thermal_domain.cc
+++ b/src/sim/power/thermal_domain.cc
@@ -72,6 +72,8 @@ ThermalDomain::setSubSystem(SubSystem * ss)
 void
 ThermalDomain::regStats()
 {
+    SimObject::regStats();
+
     currentTemp
         .method(this, &ThermalDomain::currentTemperature)
         .name(params()->name + ".temp")
diff --git a/src/sim/voltage_domain.cc b/src/sim/voltage_domain.cc
index b82efda33..61715dfbc 100644
--- a/src/sim/voltage_domain.cc
+++ b/src/sim/voltage_domain.cc
@@ -128,6 +128,8 @@ VoltageDomain::startup() {
 void
 VoltageDomain::regStats()
 {
+    SimObject::regStats();
+
     currentVoltage
         .method(this, &VoltageDomain::voltage)
         .name(params()->name + ".voltage")