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authorGabe Black <gblack@eecs.umich.edu>2007-07-29 01:30:28 -0700
committerGabe Black <gblack@eecs.umich.edu>2007-07-29 01:30:28 -0700
commite5f58903651299d8cbba793423d953e750eb16f4 (patch)
tree28923cc4b161ce254c2a84d2b4261517ae6ca086
parentc52e28a4d9ddfcfb3e3610b88c1470d3147375a5 (diff)
downloadgem5-e5f58903651299d8cbba793423d953e750eb16f4.tar.xz
X86: Make limm use merge and allow overriding the data size.
--HG-- extra : convert_revision : c6057226b8ff8f272612a9d3bf7d1d9ba90c819b
-rw-r--r--src/arch/x86/isa/microops/limmop.isa6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/arch/x86/isa/microops/limmop.isa b/src/arch/x86/isa/microops/limmop.isa
index 37180d7fa..ec68c36dc 100644
--- a/src/arch/x86/isa/microops/limmop.isa
+++ b/src/arch/x86/isa/microops/limmop.isa
@@ -142,12 +142,12 @@ def template MicroLimmOpConstructor {{
let {{
class LimmOp(X86Microop):
- def __init__(self, dest, imm):
+ def __init__(self, dest, imm, dataSize="env.dataSize"):
self.className = "Limm"
self.mnemonic = "limm"
self.dest = dest
self.imm = imm
- self.dataSize = "env.dataSize"
+ self.dataSize = dataSize
def getAllocator(self, *microFlags):
allocator = '''new %(class_name)s(machInst, mnemonic
@@ -165,7 +165,7 @@ let {{
let {{
# Build up the all register version of this micro op
iop = InstObjParams("limm", "Limm", 'X86MicroopBase',
- {"code" : "DestReg = imm;"})
+ {"code" : "DestReg = merge(DestReg, imm, dataSize);"})
header_output += MicroLimmOpDeclare.subst(iop)
decoder_output += MicroLimmOpConstructor.subst(iop)
decoder_output += MicroLimmOpDisassembly.subst(iop)