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| author | Steve Reinhardt <stever@eecs.umich.edu> | 2006-03-12 01:07:58 -0500 |
|---|---|---|
| committer | Steve Reinhardt <stever@eecs.umich.edu> | 2006-03-12 01:07:58 -0500 |
| commit | 18ba0f85486f0dd919064ba2b0ed8c53a7861298 (patch) | |
| tree | 43fd59d7dd33f126435ba62466304f4104df03fe | |
| parent | 38dd86ce7297b1ebecc5996c0c158990e14b1f02 (diff) | |
| parent | 918b3f59c2822605e8959fb7195c3da59baaa528 (diff) | |
| download | gem5-18ba0f85486f0dd919064ba2b0ed8c53a7861298.tar.xz | |
Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/z/stever/bk/newmem-head
--HG--
extra : convert_revision : a784e60b7f79d70b09052fc4a8ae35a821d307dc
| -rw-r--r-- | arch/alpha/tru64/process.cc | 1 | ||||
| -rw-r--r-- | sim/process.cc | 1 |
2 files changed, 0 insertions, 2 deletions
diff --git a/arch/alpha/tru64/process.cc b/arch/alpha/tru64/process.cc index d77e7f9e9..be78cb96e 100644 --- a/arch/alpha/tru64/process.cc +++ b/arch/alpha/tru64/process.cc @@ -30,7 +30,6 @@ #include "arch/alpha/tru64/process.hh" #include "cpu/exec_context.hh" #include "kern/tru64/tru64.hh" -#include "sim/fake_syscall.hh" #include "sim/process.hh" #include "sim/syscall_emul.hh" diff --git a/sim/process.cc b/sim/process.cc index 70a92a604..d5f97ee5f 100644 --- a/sim/process.cc +++ b/sim/process.cc @@ -46,7 +46,6 @@ #include "mem/memory.hh" #include "mem/translating_port.hh" #include "sim/builder.hh" -#include "sim/fake_syscall.hh" #include "sim/process.hh" #include "sim/stats.hh" #include "sim/syscall_emul.hh" |