Merge.

--HG--
extra : convert_revision : e83f6895bceb0ced656e90275ec1a93d0af5498d

2 files changed, 42 insertions, 3 deletions

diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc
index 75b2f4138..6a95b4e04 100644
--- a/arch/alpha/isa_desc
+++ b/arch/alpha/isa_desc
@@ -1000,10 +1000,50 @@ def template PrefetchDeclare {{
      */
     class %(class_name)s : public %(base_class)s
     {
+      protected:
+
+	/**
+	 * "Fake" effective address computation class for "%(mnemonic)s".
+	 */
+	class EAComp : public EACompBase
+	{
+	  public:
+	    /// Constructor
+	    EAComp(MachInst machInst)
+		: EACompBase(machInst)
+	    {
+		%(ea_constructor)s;
+	    }
+	};
+
+	/**
+	 * "Fake" memory access instruction class for "%(mnemonic)s".
+	 */
+	class MemAcc : public MemAccBase
+	{
+	  public:
+	    /// Constructor
+	    MemAcc(MachInst machInst)
+		: MemAccBase(machInst, %(op_class)s)
+	    {
+		%(memacc_constructor)s;
+	    }
+	};
+
+	/// Pointer to EAComp object.
+	StaticInstPtr<AlphaISA> eaCompPtr;
+	/// Pointer to MemAcc object.
+	StaticInstPtr<AlphaISA> memAccPtr;
+
       public:
+
+	StaticInstPtr<AlphaISA> eaCompInst() { return eaCompPtr; }
+	StaticInstPtr<AlphaISA> memAccInst() { return memAccPtr; }
+
 	/// Constructor
 	%(class_name)s(MachInst machInst)
-	     : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
+	     : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s),
+	       eaCompPtr(new EAComp(machInst)), memAccPtr(new MemAcc(machInst))
 	{
 	    %(constructor)s;
 	}
diff --git a/cpu/simple_cpu/simple_cpu.hh b/cpu/simple_cpu/simple_cpu.hh
index 4a9872e75..2b881509c 100644
--- a/cpu/simple_cpu/simple_cpu.hh
+++ b/cpu/simple_cpu/simple_cpu.hh
@@ -237,10 +237,9 @@ class SimpleCPU : public BaseCPU
     Fault write(T data, Addr addr, unsigned flags,
                         uint64_t *res);
 
-    Fault prefetch(Addr addr, unsigned flags)
+    void prefetch(Addr addr, unsigned flags)
     {
         // need to do this...
-        return No_Fault;
     }
 
     void writeHint(Addr addr, int size)