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authorGabe Black <gblack@eecs.umich.edu>2010-10-22 00:22:59 -0700
committerGabe Black <gblack@eecs.umich.edu>2010-10-22 00:22:59 -0700
commitbc49381287698297446da3e6f7b43b8ef4f43b27 (patch)
tree3387de509e98b10bc11e5c6fad2fd6d96f0d9855
parent45aebaccde9af3ef50f8ee168606a370952a99ab (diff)
downloadgem5-bc49381287698297446da3e6f7b43b8ef4f43b27.tar.xz
ARM: Don't pretend to writeback registers in initiateAcc.
-rw-r--r--src/arch/arm/isa/templates/mem.isa19
1 files changed, 0 insertions, 19 deletions
diff --git a/src/arch/arm/isa/templates/mem.isa b/src/arch/arm/isa/templates/mem.isa
index 1d0e1316c..ced7a0037 100644
--- a/src/arch/arm/isa/templates/mem.isa
+++ b/src/arch/arm/isa/templates/mem.isa
@@ -131,10 +131,6 @@ def template SwapInitiateAcc {{
fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
memAccessFlags, &memData);
}
-
- if (fault == NoFault) {
- %(op_wb)s;
- }
} else {
xc->setPredicate(false);
}
@@ -393,11 +389,6 @@ def template StoreExInitiateAcc {{
fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
memAccessFlags, NULL);
}
-
- // Need to write back any potential address register update
- if (fault == NoFault) {
- %(op_wb)s;
- }
} else {
xc->setPredicate(false);
}
@@ -431,11 +422,6 @@ def template StoreInitiateAcc {{
fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
memAccessFlags, NULL);
}
-
- // Need to write back any potential address register update
- if (fault == NoFault) {
- %(op_wb)s;
- }
} else {
xc->setPredicate(false);
}
@@ -473,11 +459,6 @@ def template NeonStoreInitiateAcc {{
fault = xc->writeBytes(memUnion.bytes, %(size)d, EA,
memAccessFlags, NULL);
}
-
- // Need to write back any potential address register update
- if (fault == NoFault) {
- %(op_wb)s;
- }
}
if (fault == NoFault && machInst.itstateMask != 0 &&