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authorGabe Black <gblack@eecs.umich.edu>2008-06-12 00:58:19 -0400
committerGabe Black <gblack@eecs.umich.edu>2008-06-12 00:58:19 -0400
commit31d40ad7c22651eb88271abddacf416aa7c2adf2 (patch)
tree6de2fe930f769c4a054b9ec52743caa78c00d6a2
parentda20c0ec54d322cbffe3c7d0053ea4dc8be24d94 (diff)
downloadgem5-31d40ad7c22651eb88271abddacf416aa7c2adf2.tar.xz
X86: Implement and hook up STI and CLI instructions.
-rw-r--r--src/arch/x86/isa/decoder/one_byte_opcodes.isa4
-rw-r--r--src/arch/x86/isa/insts/general_purpose/flags/set_and_clear.py22
2 files changed, 17 insertions, 9 deletions
diff --git a/src/arch/x86/isa/decoder/one_byte_opcodes.isa b/src/arch/x86/isa/decoder/one_byte_opcodes.isa
index 8729f417d..005864f02 100644
--- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa
+++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa
@@ -553,8 +553,8 @@
0x1F: decode OPCODE_OP_BOTTOM3 {
0x0: CLC();
0x1: STC();
- 0x2: WarnUnimpl::cli();
- 0x3: WarnUnimpl::sti();
+ 0x2: CLI();
+ 0x3: STI();
0x4: CLD();
0x5: STD();
//0x6: group4();
diff --git a/src/arch/x86/isa/insts/general_purpose/flags/set_and_clear.py b/src/arch/x86/isa/insts/general_purpose/flags/set_and_clear.py
index 4c655e0b2..e151dc61d 100644
--- a/src/arch/x86/isa/insts/general_purpose/flags/set_and_clear.py
+++ b/src/arch/x86/isa/insts/general_purpose/flags/set_and_clear.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2007 The Hewlett-Packard Development Company
+# Copyright (c) 2007-2008 The Hewlett-Packard Development Company
# All rights reserved.
#
# Redistribution and use of this software in source and binary forms,
@@ -84,10 +84,18 @@ def macroop CMC {
ruflags t1
wruflagsi t1, "CFBit"
};
+
+def macroop STI {
+ rflags t1
+ limm t2, "IFBit"
+ or t1, t1, t2
+ wrflags t1, t0
+};
+
+def macroop CLI {
+ rflags t1
+ limm t2, "~IFBit"
+ and t1, t1, t2
+ wrflags t1, t0
+};
'''
-#let {{
-# class CLI(Inst):
-# "GenFault ${new UnimpInstFault}"
-# class STI(Inst):
-# "GenFault ${new UnimpInstFault}"
-#}};