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| author | Gabe Black <gabeblack@google.com> | 2018-01-05 17:48:40 -0800 |
|---|---|---|
| committer | Gabe Black <gabeblack@google.com> | 2018-01-20 08:07:23 +0000 |
| commit | 703662624ca9f6f5454b4d1ac773475c0af1bec5 (patch) | |
| tree | 68181a1f3683dc45c9346c09a379679e1d13d16c | |
| parent | 2a15bfd79ced20a6d4cbf0a0a4c2fbb1444b9a44 (diff) | |
| download | gem5-703662624ca9f6f5454b4d1ac773475c0af1bec5.tar.xz | |
x86, mem: Pass the multi level page table layout in as a parameter.
Don't get it from a global constant declared in an ISA header file.
Change-Id: Ie19440abdd76500a5e12e6791e6f755ad9e95af3
Reviewed-on: https://gem5-review.googlesource.com/7344
Maintainer: Gabe Black <gabeblack@google.com>
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Reviewed-by: Alexandru Duțu <alexandru.dutu@amd.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
| -rw-r--r-- | src/arch/x86/process.cc | 3 | ||||
| -rw-r--r-- | src/mem/multi_level_page_table.hh | 3 | ||||
| -rw-r--r-- | src/mem/multi_level_page_table_impl.hh | 8 |
3 files changed, 8 insertions, 6 deletions
diff --git a/src/arch/x86/process.cc b/src/arch/x86/process.cc index 52255af7a..627750cbd 100644 --- a/src/arch/x86/process.cc +++ b/src/arch/x86/process.cc @@ -101,7 +101,8 @@ X86Process::X86Process(ProcessParams *params, ObjectFile *objFile, : Process(params, params->useArchPT ? static_cast<EmulationPageTable *>( new ArchPageTable(params->name, params->pid, - params->system, PageBytes)) : + params->system, PageBytes, + PageTableLayout)) : new EmulationPageTable(params->name, params->pid, PageBytes), objFile), diff --git a/src/mem/multi_level_page_table.hh b/src/mem/multi_level_page_table.hh index 10e411eb1..f71dc0dbc 100644 --- a/src/mem/multi_level_page_table.hh +++ b/src/mem/multi_level_page_table.hh @@ -139,7 +139,8 @@ class MultiLevelPageTable : public EmulationPageTable public: MultiLevelPageTable(const std::string &__name, uint64_t _pid, - System *_sys, Addr pageSize); + System *_sys, Addr pageSize, + const std::vector<uint8_t> &layout); ~MultiLevelPageTable(); void initState(ThreadContext* tc) override; diff --git a/src/mem/multi_level_page_table_impl.hh b/src/mem/multi_level_page_table_impl.hh index 3222f5f11..2d7ddc4e4 100644 --- a/src/mem/multi_level_page_table_impl.hh +++ b/src/mem/multi_level_page_table_impl.hh @@ -45,11 +45,11 @@ using namespace std; using namespace TheISA; template <class ISAOps> -MultiLevelPageTable<ISAOps>::MultiLevelPageTable(const std::string &__name, - uint64_t _pid, System *_sys, - Addr pageSize) +MultiLevelPageTable<ISAOps>::MultiLevelPageTable( + const std::string &__name, uint64_t _pid, System *_sys, + Addr pageSize, const std::vector<uint8_t> &layout) : EmulationPageTable(__name, _pid, pageSize), system(_sys), - logLevelSize(PageTableLayout), + logLevelSize(layout), numLevels(logLevelSize.size()) { } |