Changed new linux stuff to work with new FunctionalMemory interface and

some sundry problems with new interface

dev/alpha_console.cc:
dev/alpha_console.hh:
dev/baddev.cc:
dev/baddev.hh:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/pcidev.cc:
dev/pcidev.hh:
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/tsunami_uart.cc:
dev/tsunami_uart.hh:
    Fixed to use new FunctionalMemory interface

--HG--
extra : convert_revision : bee98e6285d92f28fafacf919ab06eaf333a9b56

16 files changed, 131 insertions, 105 deletions

diff --git a/dev/alpha_console.cc b/dev/alpha_console.cc
index e1b69c3ce..79317b15b 100644
--- a/dev/alpha_console.cc
+++ b/dev/alpha_console.cc
@@ -51,10 +51,10 @@
 using namespace std;
 
 AlphaConsole::AlphaConsole(const string &name, SimConsole *cons,
-                           SimpleDisk *d, int size, System *system,
+                           SimpleDisk *d, System *system,
                            BaseCPU *cpu, TsunamiIO *clock, int num_cpus,
-                           Addr addr, Addr mask, MemoryController *mmu)
-    : MmapDevice(name, addr, mask, mmu), disk(d), console(cons)
+                           Addr a, MemoryController *mmu)
+    : FunctionalMemory(name), disk(d), console(cons), addr(a)
 {
     mmu->add_child(this, Range<Addr>(addr, addr + size));
 
@@ -272,7 +272,7 @@ END_INIT_SIM_OBJECT_PARAMS(AlphaConsole)
 CREATE_SIM_OBJECT(AlphaConsole)
 {
     return  new AlphaConsole(getInstanceName(), sim_console, disk,
-                             system, cpu, clock, num_cpus, mmu, addr);
+                             system, cpu, clock, num_cpus, addr, mmu);
 }
 
 REGISTER_SIM_OBJECT("AlphaConsole", AlphaConsole)
diff --git a/dev/alpha_console.hh b/dev/alpha_console.hh
index 29ebec1bb..d0fa552af 100644
--- a/dev/alpha_console.hh
+++ b/dev/alpha_console.hh
@@ -90,10 +90,9 @@ class AlphaConsole : public FunctionalMemory
   public:
     /** Standard Constructor */
     AlphaConsole(const std::string &name, SimConsole *cons,
-                 SimpleDisk *d, int size,
-                 System *system, BaseCPU *cpu,
+                 SimpleDisk *d, System *system, BaseCPU *cpu,
                  TsunamiIO *clock, int num_cpus,
-                 Addr addr, Addr mask, MemoryController *mmu);
+                 Addr a, MemoryController *mmu);
 
     /**
      * memory mapped reads and writes
diff --git a/dev/baddev.cc b/dev/baddev.cc
index d91069bae..8a5d68533 100644
--- a/dev/baddev.cc
+++ b/dev/baddev.cc
@@ -20,10 +20,11 @@
 
 using namespace std;
 
-BadDevice::BadDevice(const string &name,
-                       Addr addr, Addr mask, MemoryController *mmu, const string &devicename)
-    : MmapDevice(name, addr, mask, mmu), devname(devicename)
+BadDevice::BadDevice(const string &name, Addr a, MemoryController *mmu,
+                     const string &devicename)
+    : FunctionalMemory(name), addr(a), devname(devicename)
 {
+    mmu->add_child(this, Range<Addr>(addr, addr + size));
 }
 
 Fault
@@ -46,7 +47,6 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(BadDevice)
 
     SimObjectParam<MemoryController *> mmu;
     Param<Addr> addr;
-    Param<Addr> mask;
     Param<string> devicename;
 
 END_DECLARE_SIM_OBJECT_PARAMS(BadDevice)
@@ -55,14 +55,13 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(BadDevice)
 
     INIT_PARAM(mmu, "Memory Controller"),
     INIT_PARAM(addr, "Device Address"),
-    INIT_PARAM(mask, "Address Mask"),
     INIT_PARAM(devicename, "Name of device to error on")
 
 END_INIT_SIM_OBJECT_PARAMS(BadDevice)
 
 CREATE_SIM_OBJECT(BadDevice)
 {
-    return new BadDevice(getInstanceName(), addr, mask, mmu, devicename);
+    return new BadDevice(getInstanceName(), addr, mmu, devicename);
 }
 
 REGISTER_SIM_OBJECT("BadDevice", BadDevice)
diff --git a/dev/baddev.hh b/dev/baddev.hh
index 29fc5f44d..ed896d792 100644
--- a/dev/baddev.hh
+++ b/dev/baddev.hh
@@ -34,7 +34,7 @@
 #ifndef __BADDEV_HH__
 #define __BADDEV_HH__
 
-#include "mem/functional_mem/mmap_device.hh"
+#include "mem/functional_mem/functional_memory.hh"
 
 /**
  * BadDevice
@@ -42,24 +42,23 @@
  * the user that the kernel they are running has unsupported
  * options (i.e. frame buffer)
  */
-class BadDevice : public MmapDevice
+class BadDevice : public FunctionalMemory
 {
   private:
+    Addr addr;
+    static const Addr size = 0xf;
 
-      std::string devname;
-  protected:
+    std::string devname;
 
   public:
     /**
-      * The default constructor.
-      */
-    BadDevice(const std::string &name, Addr addr, Addr mask,
-              MemoryController *mmu, const std::string &devicename);
+     * The default constructor.
+     */
+    BadDevice(const std::string &name, Addr a, MemoryController *mmu,
+              const std::string &devicename);
 
     virtual Fault read(MemReqPtr &req, uint8_t *data);
     virtual Fault write(MemReqPtr &req, const uint8_t *data);
-
-
 };
 
 #endif // __BADDEV_HH__
diff --git a/dev/pciconfigall.cc b/dev/pciconfigall.cc
index 1b19ec368..0c1efd898 100644
--- a/dev/pciconfigall.cc
+++ b/dev/pciconfigall.cc
@@ -47,10 +47,12 @@
 
 using namespace std;
 
-PCIConfigAll::PCIConfigAll(const string &name, Tsunami *t,
-                           Addr addr, Addr mask, MemoryController *mmu)
-    : MmapDevice(name, addr, mask, mmu), tsunami(t)
+PCIConfigAll::PCIConfigAll(const string &name, Tsunami *t, Addr a,
+                           MemoryController *mmu)
+    : FunctionalMemory(name), addr(a), tsunami(t)
 {
+    mmu->add_child(this, Range<Addr>(addr, addr + size));
+
     // Put back pointer in tsunami
     tsunami->pciconfig = this;
 
@@ -66,7 +68,7 @@ PCIConfigAll::read(MemReqPtr &req, uint8_t *data)
     DPRINTF(PCIConfigAll, "read  va=%#x size=%d\n",
             req->vaddr, req->size);
 
-    Addr daddr = (req->paddr & addr_mask);
+    Addr daddr = (req->paddr & size);
 
     int device = (daddr >> 11) & 0x1F;
     int func = (daddr >> 8) & 0x7;
@@ -110,7 +112,7 @@ PCIConfigAll::read(MemReqPtr &req, uint8_t *data)
 Fault
 PCIConfigAll::write(MemReqPtr &req, const uint8_t *data)
 {
-    Addr daddr = (req->paddr & addr_mask);
+    Addr daddr = (req->paddr & size);
 
     int device = (daddr >> 11) & 0x1F;
     int func = (daddr >> 8) & 0x7;
@@ -182,7 +184,7 @@ END_INIT_SIM_OBJECT_PARAMS(PCIConfigAll)
 
 CREATE_SIM_OBJECT(PCIConfigAll)
 {
-    return new PCIConfigAll(getInstanceName(), tsunami, addr, mask, mmu);
+    return new PCIConfigAll(getInstanceName(), tsunami, addr, mmu);
 }
 
 REGISTER_SIM_OBJECT("PCIConfigAll", PCIConfigAll)
diff --git a/dev/pciconfigall.hh b/dev/pciconfigall.hh
index 070643fd9..95a171c53 100644
--- a/dev/pciconfigall.hh
+++ b/dev/pciconfigall.hh
@@ -38,7 +38,7 @@
 #ifndef __PCICONFIGALL_HH__
 #define __PCICONFIGALL_HH__
 
-#include "mem/functional_mem/mmap_device.hh"
+#include "mem/functional_mem/functional_memory.hh"
 #include "dev/tsunami.hh"
 #include "dev/pcireg.h"
 
@@ -54,9 +54,11 @@ class PciDev;
  * space and passes the requests on to TsunamiPCIDev devices as
  * appropriate.
  */
-class PCIConfigAll : public MmapDevice
+class PCIConfigAll : public FunctionalMemory
 {
   private:
+    Addr addr;
+    static const Addr size = 0xffffff;
 
   protected:
 
@@ -77,8 +79,8 @@ class PCIConfigAll : public MmapDevice
     /**
       * The default constructor.
       */
-    PCIConfigAll(const std::string &name, Tsunami *t,
-                 Addr addr, Addr mask, MemoryController *mmu);
+    PCIConfigAll(const std::string &name, Tsunami *t, Addr a,
+                 MemoryController *mmu);
 
     virtual Fault read(MemReqPtr &req, uint8_t *data);
     virtual Fault write(MemReqPtr &req, const uint8_t *data);
diff --git a/dev/pcidev.cc b/dev/pcidev.cc
index 9d9fbcd89..c0358cd5a 100644
--- a/dev/pcidev.cc
+++ b/dev/pcidev.cc
@@ -53,7 +53,7 @@ using namespace std;
 
 PciDev::PciDev(const string &name, MemoryController *mmu, PCIConfigAll *cf,
                PciConfigData *cd, uint32_t bus, uint32_t dev, uint32_t func)
-    : MmapDevice(name), MMU(mmu), ConfigSpace(cf), ConfigData(cd),
+    : FunctionalMemory(name), MMU(mmu), ConfigSpace(cf), ConfigData(cd),
       Bus(bus), Device(dev), Function(func)
 {
     // copy the config data from the PciConfigData object
@@ -180,15 +180,24 @@ PciDev::WriteConfig(int offset, int size, uint32_t data)
                         (config.data[offset] & 0x3);
 
                     if (word_value & ~0x1) {
+                        Addr base_addr = (word_value & ~0x1) + TSUNAMI_PCI0_IO;
+                        Addr base_size = BARSize[barnum]-1;
+
                         // It's never been set
                         if (BARAddrs[barnum] == 0)
-                            AddMapping((word_value & ~0x1) + TSUNAMI_PCI0_IO,
-                                       BARSize[barnum]-1, MMU);
+                            MMU->add_child(this,
+                                           Range<Addr>(base_addr,
+                                                       base_addr + base_size));
                         else
-                            ChangeMapping(BARAddrs[barnum], BARSize[barnum]-1,
-                                          (word_value & ~0x1) + TSUNAMI_PCI0_IO,
-                                          BARSize[barnum]-1, MMU);
-                        BARAddrs[barnum] = (word_value & ~0x1) + TSUNAMI_PCI0_IO;
+                            MMU->update_child(this,
+                                              Range<Addr>(BARAddrs[barnum],
+                                                          BARAddrs[barnum] +
+                                                          base_size),
+                                              Range<Addr>(base_addr,
+                                                          base_addr +
+                                                          base_size));
+
+                        BARAddrs[barnum] = base_addr;
                     }
 
                 } else {
@@ -197,17 +206,26 @@ PciDev::WriteConfig(int offset, int size, uint32_t data)
                         (config.data[offset] & 0xF);
 
                     if (word_value & ~0x3) {
+                        Addr base_addr = (word_value & ~0x3) +
+                            TSUNAMI_PCI0_MEMORY;
+
+                        Addr base_size = BARSize[barnum]-1;
+
                         // It's never been set
                         if (BARAddrs[barnum] == 0)
-                            AddMapping((word_value & ~0x3) + TSUNAMI_PCI0_MEMORY,
-                                       BARSize[barnum]-1, MMU);
+                            MMU->add_child(this,
+                                           Range<Addr>(base_addr,
+                                                       base_addr + base_size));
                         else
-                            ChangeMapping(BARAddrs[barnum], BARSize[barnum]-1,
-                                          (word_value & ~0x3) +
-                                          TSUNAMI_PCI0_MEMORY,
-                                          BARSize[barnum]-1, MMU);
-                        BARAddrs[barnum] = (word_value & ~0x3) +
-                                           TSUNAMI_PCI0_MEMORY;
+                            MMU->update_child(this,
+                                              Range<Addr>(BARAddrs[barnum],
+                                                          BARAddrs[barnum] +
+                                                          base_size),
+                                              Range<Addr>(base_addr,
+                                                          base_addr +
+                                                          base_size));
+
+                        BARAddrs[barnum] = base_addr;
                     }
                  }
             }
diff --git a/dev/pcidev.hh b/dev/pcidev.hh
index 8cb68945a..dcd3d1b8a 100644
--- a/dev/pcidev.hh
+++ b/dev/pcidev.hh
@@ -35,7 +35,7 @@
 
 #include "dev/pcireg.h"
 #include "sim/sim_object.hh"
-#include "mem/functional_mem/mmap_device.hh"
+#include "mem/functional_mem/functional_memory.hh"
 
 class PCIConfigAll;
 class MemoryController;
@@ -63,7 +63,7 @@ class PciConfigData : public SimObject
  * register with it. This object registers with the PCIConfig space
  * object.
  */
-class PciDev : public MmapDevice
+class PciDev : public FunctionalMemory
 {
   protected:
     MemoryController *MMU;
diff --git a/dev/tsunami_cchip.cc b/dev/tsunami_cchip.cc
index ceac5300f..374c50d66 100644
--- a/dev/tsunami_cchip.cc
+++ b/dev/tsunami_cchip.cc
@@ -21,10 +21,12 @@
 
 using namespace std;
 
-TsunamiCChip::TsunamiCChip(const string &name, Tsunami *t,
-                       Addr addr, Addr mask, MemoryController *mmu)
-    : MmapDevice(name, addr, mask, mmu), tsunami(t)
+TsunamiCChip::TsunamiCChip(const string &name, Tsunami *t, Addr a,
+                           MemoryController *mmu)
+    : FunctionalMemory(name), addr(a), tsunami(t)
 {
+    mmu->add_child(this, Range<Addr>(addr, addr + size));
+
     for(int i=0; i < Tsunami::Max_CPUs; i++) {
         dim[i] = 0;
         dir[i] = 0;
@@ -45,7 +47,7 @@ TsunamiCChip::read(MemReqPtr &req, uint8_t *data)
     DPRINTF(Tsunami, "read  va=%#x size=%d\n",
             req->vaddr, req->size);
 
-    Addr daddr = (req->paddr & addr_mask) >> 6;
+    Addr daddr = (req->paddr & size) >> 6;
     ExecContext *xc = req->xc;
 
     switch (req->size) {
@@ -131,7 +133,7 @@ TsunamiCChip::write(MemReqPtr &req, const uint8_t *data)
     DPRINTF(Tsunami, "write - va=%#x size=%d \n",
             req->vaddr, req->size);
 
-    Addr daddr = (req->paddr & addr_mask) >> 6;
+    Addr daddr = (req->paddr & size) >> 6;
 
     switch (req->size) {
 
@@ -291,7 +293,6 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(TsunamiCChip)
     SimObjectParam<Tsunami *> tsunami;
     SimObjectParam<MemoryController *> mmu;
     Param<Addr> addr;
-    Param<Addr> mask;
 
 END_DECLARE_SIM_OBJECT_PARAMS(TsunamiCChip)
 
@@ -299,14 +300,13 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(TsunamiCChip)
 
     INIT_PARAM(tsunami, "Tsunami"),
     INIT_PARAM(mmu, "Memory Controller"),
-    INIT_PARAM(addr, "Device Address"),
-    INIT_PARAM(mask, "Address Mask")
+    INIT_PARAM(addr, "Device Address")
 
 END_INIT_SIM_OBJECT_PARAMS(TsunamiCChip)
 
 CREATE_SIM_OBJECT(TsunamiCChip)
 {
-    return new TsunamiCChip(getInstanceName(), tsunami, addr, mask, mmu);
+    return new TsunamiCChip(getInstanceName(), tsunami, addr, mmu);
 }
 
 REGISTER_SIM_OBJECT("TsunamiCChip", TsunamiCChip)
diff --git a/dev/tsunami_cchip.hh b/dev/tsunami_cchip.hh
index 16d795afb..8c8ed4d20 100644
--- a/dev/tsunami_cchip.hh
+++ b/dev/tsunami_cchip.hh
@@ -33,15 +33,17 @@
 #ifndef __TSUNAMI_CCHIP_HH__
 #define __TSUNAMI_CCHIP_HH__
 
-#include "mem/functional_mem/mmap_device.hh"
+#include "mem/functional_mem/functional_memory.hh"
 #include "dev/tsunami.hh"
 
 /*
  * Tsunami CChip
  */
-class TsunamiCChip : public MmapDevice
+class TsunamiCChip : public FunctionalMemory
 {
-  public:
+  private:
+    Addr addr;
+    static const Addr size = 0xfff;
 
   protected:
       /**
@@ -71,8 +73,8 @@ class TsunamiCChip : public MmapDevice
     uint64_t drir;
 
   public:
-    TsunamiCChip(const std::string &name, Tsunami *t,
-               Addr addr, Addr mask, MemoryController *mmu);
+    TsunamiCChip(const std::string &name, Tsunami *t, Addr a,
+                 MemoryController *mmu);
 
     virtual Fault read(MemReqPtr &req, uint8_t *data);
     virtual Fault write(MemReqPtr &req, const uint8_t *data);
diff --git a/dev/tsunami_io.cc b/dev/tsunami_io.cc
index 25323ee14..dd2ac3acc 100644
--- a/dev/tsunami_io.cc
+++ b/dev/tsunami_io.cc
@@ -125,9 +125,11 @@ TsunamiIO::ClockEvent::Status()
 }
 
 TsunamiIO::TsunamiIO(const string &name, Tsunami *t, time_t init_time,
-                     Addr addr, Addr mask, MemoryController *mmu)
-    : MmapDevice(name, addr, mask, mmu), tsunami(t), rtc(t)
+                     Addr a, MemoryController *mmu)
+    : FunctionalMemory(name), addr(a), tsunami(t), rtc(t)
 {
+    mmu->add_child(this, Range<Addr>(addr, addr + size));
+
     // set the back pointer from tsunami to myself
     tsunami->io = this;
 
@@ -151,7 +153,7 @@ TsunamiIO::read(MemReqPtr &req, uint8_t *data)
     DPRINTF(Tsunami, "io read  va=%#x size=%d IOPorrt=%#x\n",
             req->vaddr, req->size, req->vaddr & 0xfff);
 
-    Addr daddr = (req->paddr & addr_mask);
+    Addr daddr = (req->paddr & size);
 //    ExecContext *xc = req->xc;
 //    int cpuid = xc->cpu_id;
 
@@ -226,7 +228,7 @@ TsunamiIO::write(MemReqPtr &req, const uint8_t *data)
     DPRINTF(Tsunami, "io write - va=%#x size=%d IOPort=%#x Data=%#x\n",
             req->vaddr, req->size, req->vaddr & 0xfff, dt64);
 
-    Addr daddr = (req->paddr & addr_mask);
+    Addr daddr = (req->paddr & size);
 
     switch(req->size) {
       case sizeof(uint8_t):
@@ -359,7 +361,6 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(TsunamiIO)
     Param<time_t> time;
     SimObjectParam<MemoryController *> mmu;
     Param<Addr> addr;
-    Param<Addr> mask;
 
 END_DECLARE_SIM_OBJECT_PARAMS(TsunamiIO)
 
@@ -369,15 +370,13 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(TsunamiIO)
     INIT_PARAM_DFLT(time, "System time to use "
             "(0 for actual time, default is 1/1/06", ULL(1136073600)),
     INIT_PARAM(mmu, "Memory Controller"),
-    INIT_PARAM(addr, "Device Address"),
-    INIT_PARAM(mask, "Address Mask")
+    INIT_PARAM(addr, "Device Address")
 
 END_INIT_SIM_OBJECT_PARAMS(TsunamiIO)
 
 CREATE_SIM_OBJECT(TsunamiIO)
 {
-    return new TsunamiIO(getInstanceName(), tsunami, time,  addr,
-                         mask, mmu);
+    return new TsunamiIO(getInstanceName(), tsunami, time,  addr, mmu);
 }
 
 REGISTER_SIM_OBJECT("TsunamiIO", TsunamiIO)
diff --git a/dev/tsunami_io.hh b/dev/tsunami_io.hh
index aa77645f3..90bef2b86 100644
--- a/dev/tsunami_io.hh
+++ b/dev/tsunami_io.hh
@@ -35,16 +35,18 @@
 
 #define RTC_RATE 1024
 
-#include "mem/functional_mem/mmap_device.hh"
+#include "mem/functional_mem/functional_memory.hh"
 #include "dev/tsunami.hh"
 
 /*
  * Tsunami I/O device
  */
-class TsunamiIO : public MmapDevice
+class TsunamiIO : public FunctionalMemory
 {
-
   private:
+    Addr addr;
+    static const Addr size = 0xff;
+
     struct tm tm;
 
     // In Tsunami RTC only has two i/o ports
@@ -121,7 +123,7 @@ class TsunamiIO : public MmapDevice
     uint32_t  frequency() const { return RTC_RATE; }
 
     TsunamiIO(const std::string &name, Tsunami *t, time_t init_time,
-              Addr addr, Addr mask,  MemoryController *mmu);
+              Addr a, MemoryController *mmu);
 
     void set_time(time_t t);
 
diff --git a/dev/tsunami_pchip.cc b/dev/tsunami_pchip.cc
index 61f126c8b..b67bd476d 100644
--- a/dev/tsunami_pchip.cc
+++ b/dev/tsunami_pchip.cc
@@ -23,10 +23,12 @@
 
 using namespace std;
 
-TsunamiPChip::TsunamiPChip(const string &name, Tsunami *t,
-                       Addr addr, Addr mask, MemoryController *mmu)
-    : MmapDevice(name, addr, mask, mmu), tsunami(t)
+TsunamiPChip::TsunamiPChip(const string &name, Tsunami *t, Addr a,
+                           MemoryController *mmu)
+    : FunctionalMemory(name), addr(a), tsunami(t)
 {
+    mmu->add_child(this, Range<Addr>(addr, addr + size));
+
     wsba0 = 0;
     wsba1 = 0;
     wsba2 = 0;
@@ -50,7 +52,7 @@ TsunamiPChip::read(MemReqPtr &req, uint8_t *data)
     DPRINTF(Tsunami, "read  va=%#x size=%d\n",
             req->vaddr, req->size);
 
-    Addr daddr = (req->paddr & addr_mask) >> 6;
+    Addr daddr = (req->paddr & size) >> 6;
 //    ExecContext *xc = req->xc;
 //    int cpuid = xc->cpu_id;
 
@@ -140,7 +142,7 @@ TsunamiPChip::write(MemReqPtr &req, const uint8_t *data)
     DPRINTF(Tsunami, "write - va=%#x size=%d \n",
             req->vaddr, req->size);
 
-    Addr daddr = (req->paddr & addr_mask) >> 6;
+    Addr daddr = (req->paddr & size) >> 6;
 
     switch (req->size) {
 
@@ -239,7 +241,6 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(TsunamiPChip)
     SimObjectParam<Tsunami *> tsunami;
     SimObjectParam<MemoryController *> mmu;
     Param<Addr> addr;
-    Param<Addr> mask;
 
 END_DECLARE_SIM_OBJECT_PARAMS(TsunamiPChip)
 
@@ -247,14 +248,13 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(TsunamiPChip)
 
     INIT_PARAM(tsunami, "Tsunami"),
     INIT_PARAM(mmu, "Memory Controller"),
-    INIT_PARAM(addr, "Device Address"),
-    INIT_PARAM(mask, "Address Mask")
+    INIT_PARAM(addr, "Device Address")
 
 END_INIT_SIM_OBJECT_PARAMS(TsunamiPChip)
 
 CREATE_SIM_OBJECT(TsunamiPChip)
 {
-    return new TsunamiPChip(getInstanceName(), tsunami, addr, mask, mmu);
+    return new TsunamiPChip(getInstanceName(), tsunami, addr, mmu);
 }
 
 REGISTER_SIM_OBJECT("TsunamiPChip", TsunamiPChip)
diff --git a/dev/tsunami_pchip.hh b/dev/tsunami_pchip.hh
index b00866e03..99530ddc0 100644
--- a/dev/tsunami_pchip.hh
+++ b/dev/tsunami_pchip.hh
@@ -33,15 +33,17 @@
 #ifndef __TSUNAMI_PCHIP_HH__
 #define __TSUNAMI_PCHIP_HH__
 
-#include "mem/functional_mem/mmap_device.hh"
+#include "mem/functional_mem/functional_memory.hh"
 #include "dev/tsunami.hh"
 
 /*
  * Tsunami PChip
  */
-class TsunamiPChip : public MmapDevice
+class TsunamiPChip : public FunctionalMemory
 {
-  public:
+  private:
+    Addr addr;
+    static const Addr size = 0xfff;
 
   protected:
     Tsunami *tsunami;
@@ -61,8 +63,8 @@ class TsunamiPChip : public MmapDevice
 
 
   public:
-    TsunamiPChip(const std::string &name, Tsunami *t,
-               Addr addr, Addr mask, MemoryController *mmu);
+    TsunamiPChip(const std::string &name, Tsunami *t, Addr a,
+                 MemoryController *mmu);
 
     virtual Fault read(MemReqPtr &req, uint8_t *data);
     virtual Fault write(MemReqPtr &req, const uint8_t *data);
diff --git a/dev/tsunami_uart.cc b/dev/tsunami_uart.cc
index 0a0b5ffef..ab9236081 100644
--- a/dev/tsunami_uart.cc
+++ b/dev/tsunami_uart.cc
@@ -31,10 +31,10 @@ using namespace std;
 #define CONS_INT_TX   0x01  // interrupt enable / state bits
 #define CONS_INT_RX   0x02
 
-TsunamiUart::TsunamiUart(const string &name, SimConsole *c,
-                       Addr addr, Addr mask, MemoryController *mmu)
-    : MmapDevice(name, addr, mask, mmu),
-      cons(c), status_store(0), valid_char(false)
+TsunamiUart::TsunamiUart(const string &name, SimConsole *c, Addr a,
+                         MemoryController *mmu)
+    : FunctionalMemory(name), addr(a), cons(c), status_store(0),
+      valid_char(false)
 {
     IER = 0;
 }
@@ -42,7 +42,7 @@ TsunamiUart::TsunamiUart(const string &name, SimConsole *c,
 Fault
 TsunamiUart::read(MemReqPtr &req, uint8_t *data)
 {
-    Addr daddr = req->paddr & addr_mask;
+    Addr daddr = req->paddr & size;
     DPRINTF(TsunamiUart, " read register %#x\n", daddr);
 
     switch (req->size) {
@@ -130,7 +130,7 @@ TsunamiUart::read(MemReqPtr &req, uint8_t *data)
 Fault
 TsunamiUart::write(MemReqPtr &req, const uint8_t *data)
 {
-    Addr daddr = req->paddr & addr_mask;
+    Addr daddr = req->paddr & size;
 
     DPRINTF(TsunamiUart, " write register %#x value %#x\n", daddr, *(uint8_t*)data);
     switch (daddr) {
@@ -198,7 +198,6 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(TsunamiUart)
     SimObjectParam<SimConsole *> console;
     SimObjectParam<MemoryController *> mmu;
     Param<Addr> addr;
-    Param<Addr> mask;
 
 END_DECLARE_SIM_OBJECT_PARAMS(TsunamiUart)
 
@@ -206,14 +205,13 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(TsunamiUart)
 
     INIT_PARAM(console, "The console"),
     INIT_PARAM(mmu, "Memory Controller"),
-    INIT_PARAM(addr, "Device Address"),
-    INIT_PARAM(mask, "Address Mask")
+    INIT_PARAM(addr, "Device Address")
 
 END_INIT_SIM_OBJECT_PARAMS(TsunamiUart)
 
 CREATE_SIM_OBJECT(TsunamiUart)
 {
-    return new TsunamiUart(getInstanceName(), console, addr, mask, mmu);
+    return new TsunamiUart(getInstanceName(), console, addr, mmu);
 }
 
 REGISTER_SIM_OBJECT("TsunamiUart", TsunamiUart)
diff --git a/dev/tsunami_uart.hh b/dev/tsunami_uart.hh
index 02d2f4543..2beefc7ea 100644
--- a/dev/tsunami_uart.hh
+++ b/dev/tsunami_uart.hh
@@ -33,15 +33,19 @@
 #ifndef __TSUNAMI_UART_HH__
 #define __TSUNAMI_UART_HH__
 
-#include "mem/functional_mem/mmap_device.hh"
+#include "mem/functional_mem/functional_memory.hh"
 
 class SimConsole;
 
 /*
  * Tsunami UART
  */
-class TsunamiUart : public MmapDevice
+class TsunamiUart : public FunctionalMemory
 {
+  private:
+    Addr addr;
+    static const Addr size = 0xf;
+
   protected:
     SimConsole *cons;
     int status_store;
@@ -50,8 +54,8 @@ class TsunamiUart : public MmapDevice
     uint8_t IER;
 
   public:
-    TsunamiUart(const std::string &name, SimConsole *c,
-               Addr addr, Addr mask, MemoryController *mmu);
+    TsunamiUart(const std::string &name, SimConsole *c, Addr a,
+                MemoryController *mmu);
 
     Fault read(MemReqPtr &req, uint8_t *data);
     Fault write(MemReqPtr &req, const uint8_t *data);