arch-arm: understandably initialize register permissions

Move massive initialization routine to the bottom of miscregs.cc.
Additionally, share register metadata across ISA instances by
making lookUpMiscReg a static member of the ISA and only
initializing it once.

Change-Id: I6d6ab26200c4e781151cc6efd97ce2420e2bf4cc
Signed-off-by: Curtis Dunham <Curtis.Dunham@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jack Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/6803
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

3 files changed, 1790 insertions, 1398 deletions

diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index a9648d203..c917abacf 100644
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -55,177 +55,12 @@
 namespace ArmISA
 {
 
-
-/**
- * Some registers alias with others, and therefore need to be translated.
- * When two mapping registers are given, they are the 32b lower and
- * upper halves, respectively, of the 64b register being mapped.
- * aligned with reference documentation ARM DDI 0487A.i pp 1540-1543
- */
-void
-ISA::initializeMiscRegMetadata()
-{
-    InitReg(MISCREG_ACTLR_EL1).mapsTo(MISCREG_ACTLR_NS);
-    InitReg(MISCREG_AFSR0_EL1).mapsTo(MISCREG_ADFSR_NS);
-    InitReg(MISCREG_AFSR1_EL1).mapsTo(MISCREG_AIFSR_NS);
-    InitReg(MISCREG_AMAIR_EL1).mapsTo(MISCREG_AMAIR0_NS,
-                                      MISCREG_AMAIR1_NS);
-    InitReg(MISCREG_CONTEXTIDR_EL1).mapsTo(MISCREG_CONTEXTIDR_NS);
-    InitReg(MISCREG_CPACR_EL1).mapsTo(MISCREG_CPACR);
-    InitReg(MISCREG_CSSELR_EL1).mapsTo(MISCREG_CSSELR_NS);
-    InitReg(MISCREG_DACR32_EL2).mapsTo(MISCREG_DACR_NS);
-    InitReg(MISCREG_FAR_EL1).mapsTo(MISCREG_DFAR_NS,
-                                    MISCREG_IFAR_NS);
-    // ESR_EL1 -> DFSR
-    InitReg(MISCREG_HACR_EL2).mapsTo(MISCREG_HACR);
-    InitReg(MISCREG_ACTLR_EL2).mapsTo(MISCREG_HACTLR);
-    InitReg(MISCREG_AFSR0_EL2).mapsTo(MISCREG_HADFSR);
-    InitReg(MISCREG_AFSR1_EL2).mapsTo(MISCREG_HAIFSR);
-    InitReg(MISCREG_AMAIR_EL2).mapsTo(MISCREG_HAMAIR0,
-                                      MISCREG_HAMAIR1);
-    InitReg(MISCREG_CPTR_EL2).mapsTo(MISCREG_HCPTR);
-    InitReg(MISCREG_HCR_EL2).mapsTo(MISCREG_HCR /*,
-                                    MISCREG_HCR2*/);
-    InitReg(MISCREG_MDCR_EL2).mapsTo(MISCREG_HDCR);
-    InitReg(MISCREG_FAR_EL2).mapsTo(MISCREG_HDFAR,
-                                    MISCREG_HIFAR);
-    InitReg(MISCREG_MAIR_EL2).mapsTo(MISCREG_HMAIR0,
-                                     MISCREG_HMAIR1);
-    InitReg(MISCREG_HPFAR_EL2).mapsTo(MISCREG_HPFAR);
-    InitReg(MISCREG_SCTLR_EL2).mapsTo(MISCREG_HSCTLR);
-    InitReg(MISCREG_ESR_EL2).mapsTo(MISCREG_HSR);
-    InitReg(MISCREG_HSTR_EL2).mapsTo(MISCREG_HSTR);
-    InitReg(MISCREG_TCR_EL2).mapsTo(MISCREG_HTCR);
-    InitReg(MISCREG_TPIDR_EL2).mapsTo(MISCREG_HTPIDR);
-    InitReg(MISCREG_TTBR0_EL2).mapsTo(MISCREG_HTTBR);
-    InitReg(MISCREG_VBAR_EL2).mapsTo(MISCREG_HVBAR);
-    InitReg(MISCREG_IFSR32_EL2).mapsTo(MISCREG_IFSR_NS);
-    InitReg(MISCREG_MAIR_EL1).mapsTo(MISCREG_PRRR_NS,
-                                     MISCREG_NMRR_NS);
-    InitReg(MISCREG_PAR_EL1).mapsTo(MISCREG_PAR_NS);
-    // RMR_EL1 -> RMR
-    // RMR_EL2 -> HRMR
-    InitReg(MISCREG_SCTLR_EL1).mapsTo(MISCREG_SCTLR_NS);
-    InitReg(MISCREG_SDER32_EL3).mapsTo(MISCREG_SDER);
-    InitReg(MISCREG_TPIDR_EL1).mapsTo(MISCREG_TPIDRPRW_NS);
-    InitReg(MISCREG_TPIDRRO_EL0).mapsTo(MISCREG_TPIDRURO_NS);
-    InitReg(MISCREG_TPIDR_EL0).mapsTo(MISCREG_TPIDRURW_NS);
-    InitReg(MISCREG_TCR_EL1).mapsTo(MISCREG_TTBCR_NS);
-    InitReg(MISCREG_TTBR0_EL1).mapsTo(MISCREG_TTBR0_NS);
-    InitReg(MISCREG_TTBR1_EL1).mapsTo(MISCREG_TTBR1_NS);
-    InitReg(MISCREG_VBAR_EL1).mapsTo(MISCREG_VBAR_NS);
-    InitReg(MISCREG_VMPIDR_EL2).mapsTo(MISCREG_VMPIDR);
-    InitReg(MISCREG_VPIDR_EL2).mapsTo(MISCREG_VPIDR);
-    InitReg(MISCREG_VTCR_EL2).mapsTo(MISCREG_VTCR);
-    InitReg(MISCREG_VTTBR_EL2).mapsTo(MISCREG_VTTBR);
-    InitReg(MISCREG_CNTFRQ_EL0).mapsTo(MISCREG_CNTFRQ);
-    InitReg(MISCREG_CNTHCTL_EL2).mapsTo(MISCREG_CNTHCTL);
-    InitReg(MISCREG_CNTHP_CTL_EL2).mapsTo(MISCREG_CNTHP_CTL);
-    InitReg(MISCREG_CNTHP_CVAL_EL2).mapsTo(MISCREG_CNTHP_CVAL); /* 64b */
-    InitReg(MISCREG_CNTHP_TVAL_EL2).mapsTo(MISCREG_CNTHP_TVAL);
-    InitReg(MISCREG_CNTKCTL_EL1).mapsTo(MISCREG_CNTKCTL);
-    InitReg(MISCREG_CNTP_CTL_EL0).mapsTo(MISCREG_CNTP_CTL_NS);
-    InitReg(MISCREG_CNTP_CVAL_EL0).mapsTo(MISCREG_CNTP_CVAL_NS); /* 64b */
-    InitReg(MISCREG_CNTP_TVAL_EL0).mapsTo(MISCREG_CNTP_TVAL_NS);
-    InitReg(MISCREG_CNTPCT_EL0).mapsTo(MISCREG_CNTPCT); /* 64b */
-    InitReg(MISCREG_CNTV_CTL_EL0).mapsTo(MISCREG_CNTV_CTL);
-    InitReg(MISCREG_CNTV_CVAL_EL0).mapsTo(MISCREG_CNTV_CVAL); /* 64b */
-    InitReg(MISCREG_CNTV_TVAL_EL0).mapsTo(MISCREG_CNTV_TVAL);
-    InitReg(MISCREG_CNTVCT_EL0).mapsTo(MISCREG_CNTVCT); /* 64b */
-    InitReg(MISCREG_CNTVOFF_EL2).mapsTo(MISCREG_CNTVOFF); /* 64b */
-    InitReg(MISCREG_DBGAUTHSTATUS_EL1).mapsTo(MISCREG_DBGAUTHSTATUS);
-    InitReg(MISCREG_DBGBCR0_EL1).mapsTo(MISCREG_DBGBCR0);
-    InitReg(MISCREG_DBGBCR1_EL1).mapsTo(MISCREG_DBGBCR1);
-    InitReg(MISCREG_DBGBCR2_EL1).mapsTo(MISCREG_DBGBCR2);
-    InitReg(MISCREG_DBGBCR3_EL1).mapsTo(MISCREG_DBGBCR3);
-    InitReg(MISCREG_DBGBCR4_EL1).mapsTo(MISCREG_DBGBCR4);
-    InitReg(MISCREG_DBGBCR5_EL1).mapsTo(MISCREG_DBGBCR5);
-    InitReg(MISCREG_DBGBVR0_EL1).mapsTo(MISCREG_DBGBVR0 /*,
-                                        MISCREG_DBGBXVR0 */);
-    InitReg(MISCREG_DBGBVR1_EL1).mapsTo(MISCREG_DBGBVR1 /*,
-                                        MISCREG_DBGBXVR1 */);
-    InitReg(MISCREG_DBGBVR2_EL1).mapsTo(MISCREG_DBGBVR2 /*,
-                                        MISCREG_DBGBXVR2 */);
-    InitReg(MISCREG_DBGBVR3_EL1).mapsTo(MISCREG_DBGBVR3 /*,
-                                        MISCREG_DBGBXVR3 */);
-    InitReg(MISCREG_DBGBVR4_EL1).mapsTo(MISCREG_DBGBVR4 /*,
-                                        MISCREG_DBGBXVR4 */);
-    InitReg(MISCREG_DBGBVR5_EL1).mapsTo(MISCREG_DBGBVR5 /*,
-                                        MISCREG_DBGBXVR5 */);
-    InitReg(MISCREG_DBGCLAIMSET_EL1).mapsTo(MISCREG_DBGCLAIMSET);
-    InitReg(MISCREG_DBGCLAIMCLR_EL1).mapsTo(MISCREG_DBGCLAIMCLR);
-    // DBGDTR_EL0 -> DBGDTR{R or T}Xint
-    // DBGDTRRX_EL0 -> DBGDTRRXint
-    // DBGDTRTX_EL0 -> DBGDTRRXint
-    InitReg(MISCREG_DBGPRCR_EL1).mapsTo(MISCREG_DBGPRCR);
-    InitReg(MISCREG_DBGVCR32_EL2).mapsTo(MISCREG_DBGVCR);
-    InitReg(MISCREG_DBGWCR0_EL1).mapsTo(MISCREG_DBGWCR0);
-    InitReg(MISCREG_DBGWCR1_EL1).mapsTo(MISCREG_DBGWCR1);
-    InitReg(MISCREG_DBGWCR2_EL1).mapsTo(MISCREG_DBGWCR2);
-    InitReg(MISCREG_DBGWCR3_EL1).mapsTo(MISCREG_DBGWCR3);
-    InitReg(MISCREG_DBGWVR0_EL1).mapsTo(MISCREG_DBGWVR0);
-    InitReg(MISCREG_DBGWVR1_EL1).mapsTo(MISCREG_DBGWVR1);
-    InitReg(MISCREG_DBGWVR2_EL1).mapsTo(MISCREG_DBGWVR2);
-    InitReg(MISCREG_DBGWVR3_EL1).mapsTo(MISCREG_DBGWVR3);
-    InitReg(MISCREG_ID_DFR0_EL1).mapsTo(MISCREG_ID_DFR0);
-    InitReg(MISCREG_MDCCSR_EL0).mapsTo(MISCREG_DBGDSCRint);
-    InitReg(MISCREG_MDRAR_EL1).mapsTo(MISCREG_DBGDRAR);
-    InitReg(MISCREG_MDSCR_EL1).mapsTo(MISCREG_DBGDSCRext);
-    InitReg(MISCREG_OSDLR_EL1).mapsTo(MISCREG_DBGOSDLR);
-    InitReg(MISCREG_OSDTRRX_EL1).mapsTo(MISCREG_DBGDTRRXext);
-    InitReg(MISCREG_OSDTRTX_EL1).mapsTo(MISCREG_DBGDTRTXext);
-    InitReg(MISCREG_OSECCR_EL1).mapsTo(MISCREG_DBGOSECCR);
-    InitReg(MISCREG_OSLAR_EL1).mapsTo(MISCREG_DBGOSLAR);
-    InitReg(MISCREG_OSLSR_EL1).mapsTo(MISCREG_DBGOSLSR);
-    InitReg(MISCREG_PMCCNTR_EL0).mapsTo(MISCREG_PMCCNTR);
-    InitReg(MISCREG_PMCEID0_EL0).mapsTo(MISCREG_PMCEID0);
-    InitReg(MISCREG_PMCEID1_EL0).mapsTo(MISCREG_PMCEID1);
-    InitReg(MISCREG_PMCNTENSET_EL0).mapsTo(MISCREG_PMCNTENSET);
-    InitReg(MISCREG_PMCNTENCLR_EL0).mapsTo(MISCREG_PMCNTENCLR);
-    InitReg(MISCREG_PMCR_EL0).mapsTo(MISCREG_PMCR);
-/*  InitReg(MISCREG_PMEVCNTR0_EL0).mapsTo(MISCREG_PMEVCNTR0);
-    InitReg(MISCREG_PMEVCNTR1_EL0).mapsTo(MISCREG_PMEVCNTR1);
-    InitReg(MISCREG_PMEVCNTR2_EL0).mapsTo(MISCREG_PMEVCNTR2);
-    InitReg(MISCREG_PMEVCNTR3_EL0).mapsTo(MISCREG_PMEVCNTR3);
-    InitReg(MISCREG_PMEVCNTR4_EL0).mapsTo(MISCREG_PMEVCNTR4);
-    InitReg(MISCREG_PMEVCNTR5_EL0).mapsTo(MISCREG_PMEVCNTR5);
-    InitReg(MISCREG_PMEVTYPER0_EL0).mapsTo(MISCREG_PMEVTYPER0);
-    InitReg(MISCREG_PMEVTYPER1_EL0).mapsTo(MISCREG_PMEVTYPER1);
-    InitReg(MISCREG_PMEVTYPER2_EL0).mapsTo(MISCREG_PMEVTYPER2);
-    InitReg(MISCREG_PMEVTYPER3_EL0).mapsTo(MISCREG_PMEVTYPER3);
-    InitReg(MISCREG_PMEVTYPER4_EL0).mapsTo(MISCREG_PMEVTYPER4);
-    InitReg(MISCREG_PMEVTYPER5_EL0).mapsTo(MISCREG_PMEVTYPER5); */
-    InitReg(MISCREG_PMINTENCLR_EL1).mapsTo(MISCREG_PMINTENCLR);
-    InitReg(MISCREG_PMINTENSET_EL1).mapsTo(MISCREG_PMINTENSET);
-//  InitReg(MISCREG_PMOVSCLR_EL0).mapsTo(MISCREG_PMOVSCLR);
-    InitReg(MISCREG_PMOVSSET_EL0).mapsTo(MISCREG_PMOVSSET);
-    InitReg(MISCREG_PMSELR_EL0).mapsTo(MISCREG_PMSELR);
-    InitReg(MISCREG_PMSWINC_EL0).mapsTo(MISCREG_PMSWINC);
-    InitReg(MISCREG_PMUSERENR_EL0).mapsTo(MISCREG_PMUSERENR);
-    InitReg(MISCREG_PMXEVCNTR_EL0).mapsTo(MISCREG_PMXEVCNTR);
-    InitReg(MISCREG_PMXEVTYPER_EL0).mapsTo(MISCREG_PMXEVTYPER);
-
-    InitReg(MISCREG_SCR).res0(0xff40)  // [31:16], [6]
-                        .res1(0x0030); // [5:4]
-
-    // from ARM DDI 0487A.i, template text
-    // "AArch64 System register ___ can be mapped to
-    //  AArch32 System register ___, but this is not
-    //  architecturally mandated."
-    InitReg(MISCREG_SCR_EL3).mapsTo(MISCREG_SCR); // D7-2005
-    // MDCR_EL3 -> SDCR, D7-2108 (the latter is unimpl. in gem5)
-    InitReg(MISCREG_SPSR_EL1).mapsTo(MISCREG_SPSR_SVC); // C5.2.17 SPSR_EL1
-    InitReg(MISCREG_SPSR_EL2).mapsTo(MISCREG_SPSR_HYP); // C5.2.18 SPSR_EL2
-    InitReg(MISCREG_SPSR_EL3).mapsTo(MISCREG_SPSR_MON); // C5.2.19 SPSR_EL3
-}
-
 ISA::ISA(Params *p)
     : SimObject(p),
       system(NULL),
       _decoderFlavour(p->decoderFlavour),
       _vecRegRenameMode(p->vecRegRenameMode),
-      pmu(p->pmu),
-      lookUpMiscReg(NUM_MISCREGS)
+      pmu(p->pmu)
 {
     miscRegs[MISCREG_SCTLR_RST] = 0;
 
@@ -261,6 +96,8 @@ ISA::ISA(Params *p)
     clear();
 }
 
+std::vector<struct ISA::MiscRegLUTEntry> ISA::lookUpMiscReg(NUM_MISCREGS);
+
 const ArmISAParams *
 ISA::params() const
 {
diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh
index d903ed06a..1711ee0be 100644
--- a/src/arch/arm/isa.hh
+++ b/src/arch/arm/isa.hh
@@ -44,6 +44,7 @@
 #define __ARCH_ARM_ISA_HH__
 
 #include "arch/arm/isa_device.hh"
+#include "arch/arm/miscregs.hh"
 #include "arch/arm/registers.hh"
 #include "arch/arm/system.hh"
 #include "arch/arm/tlb.hh"
@@ -112,10 +113,11 @@ namespace ArmISA
         };
 
         /** Metadata table accessible via the value of the register */
-        std::vector<struct MiscRegLUTEntry> lookUpMiscReg;
+        static std::vector<struct MiscRegLUTEntry> lookUpMiscReg;
 
         class MiscRegLUTEntryInitializer {
             struct MiscRegLUTEntry &entry;
+            std::bitset<NUM_MISCREG_INFOS> &info;
             typedef const MiscRegLUTEntryInitializer& chain;
           public:
             chain mapsTo(uint32_t l, uint32_t u = 0) const {
@@ -139,13 +141,197 @@ namespace ArmISA
                 entry._rao  = mask;
                 return *this;
             }
-            MiscRegLUTEntryInitializer(struct MiscRegLUTEntry &e)
-                : entry(e)
-              {}
+            chain implemented(bool v = true) const {
+                info[MISCREG_IMPLEMENTED] = v;
+                return *this;
+            }
+            chain unimplemented() const {
+                return implemented(false);
+            }
+            chain unverifiable(bool v = true) const {
+                info[MISCREG_UNVERIFIABLE] = v;
+                return *this;
+            }
+            chain warnNotFail(bool v = true) const {
+                info[MISCREG_WARN_NOT_FAIL] = v;
+                return *this;
+            }
+            chain mutex(bool v = true) const {
+                info[MISCREG_MUTEX] = v;
+                return *this;
+            }
+            chain banked(bool v = true) const {
+                info[MISCREG_BANKED] = v;
+                return *this;
+            }
+            chain bankedChild(bool v = true) const {
+                info[MISCREG_BANKED_CHILD] = v;
+                return *this;
+            }
+            chain userNonSecureRead(bool v = true) const {
+                info[MISCREG_USR_NS_RD] = v;
+                return *this;
+            }
+            chain userNonSecureWrite(bool v = true) const {
+                info[MISCREG_USR_NS_WR] = v;
+                return *this;
+            }
+            chain userSecureRead(bool v = true) const {
+                info[MISCREG_USR_S_RD] = v;
+                return *this;
+            }
+            chain userSecureWrite(bool v = true) const {
+                info[MISCREG_USR_S_WR] = v;
+                return *this;
+            }
+            chain user(bool v = true) const {
+                userNonSecureRead(v);
+                userNonSecureWrite(v);
+                userSecureRead(v);
+                userSecureWrite(v);
+                return *this;
+            }
+            chain privNonSecureRead(bool v = true) const {
+                info[MISCREG_PRI_NS_RD] = v;
+                return *this;
+            }
+            chain privNonSecureWrite(bool v = true) const {
+                info[MISCREG_PRI_NS_WR] = v;
+                return *this;
+            }
+            chain privSecureRead(bool v = true) const {
+                info[MISCREG_PRI_S_RD] = v;
+                return *this;
+            }
+            chain privSecureWrite(bool v = true) const {
+                info[MISCREG_PRI_S_WR] = v;
+                return *this;
+            }
+            chain privSecure(bool v = true) const {
+                privSecureRead(v);
+                privSecureWrite(v);
+                return *this;
+            }
+            chain hypRead(bool v = true) const {
+                info[MISCREG_HYP_RD] = v;
+                return *this;
+            }
+            chain hypWrite(bool v = true) const {
+                info[MISCREG_HYP_WR] = v;
+                return *this;
+            }
+            chain hyp(bool v = true) const {
+                hypRead(v);
+                hypWrite(v);
+                return *this;
+            }
+            chain monSecureRead(bool v = true) const {
+                info[MISCREG_MON_NS0_RD] = v;
+                return *this;
+            }
+            chain monSecureWrite(bool v = true) const {
+                info[MISCREG_MON_NS0_WR] = v;
+                return *this;
+            }
+            chain monNonSecureRead(bool v = true) const {
+                info[MISCREG_MON_NS1_RD] = v;
+                return *this;
+            }
+            chain monNonSecureWrite(bool v = true) const {
+                info[MISCREG_MON_NS1_WR] = v;
+                return *this;
+            }
+            chain mon(bool v = true) const {
+                monSecureRead(v);
+                monSecureWrite(v);
+                monNonSecureRead(v);
+                monNonSecureWrite(v);
+                return *this;
+            }
+            chain monSecure(bool v = true) const {
+                monSecureRead(v);
+                monSecureWrite(v);
+                return *this;
+            }
+            chain monNonSecure(bool v = true) const {
+                monNonSecureRead(v);
+                monNonSecureWrite(v);
+                return *this;
+            }
+            chain allPrivileges(bool v = true) const {
+                userNonSecureRead(v);
+                userNonSecureWrite(v);
+                userSecureRead(v);
+                userSecureWrite(v);
+                privNonSecureRead(v);
+                privNonSecureWrite(v);
+                privSecureRead(v);
+                privSecureWrite(v);
+                hypRead(v);
+                hypWrite(v);
+                monSecureRead(v);
+                monSecureWrite(v);
+                monNonSecureRead(v);
+                monNonSecureWrite(v);
+                return *this;
+            }
+            chain nonSecure(bool v = true) const {
+                userNonSecureRead(v);
+                userNonSecureWrite(v);
+                privNonSecureRead(v);
+                privNonSecureWrite(v);
+                hypRead(v);
+                hypWrite(v);
+                monNonSecureRead(v);
+                monNonSecureWrite(v);
+                return *this;
+            }
+            chain secure(bool v = true) const {
+                userSecureRead(v);
+                userSecureWrite(v);
+                privSecureRead(v);
+                privSecureWrite(v);
+                monSecureRead(v);
+                monSecureWrite(v);
+                return *this;
+            }
+            chain reads(bool v) const {
+                userNonSecureRead(v);
+                userSecureRead(v);
+                privNonSecureRead(v);
+                privSecureRead(v);
+                hypRead(v);
+                monSecureRead(v);
+                monNonSecureRead(v);
+                return *this;
+            }
+            chain writes(bool v) const {
+                userNonSecureWrite(v);
+                userSecureWrite(v);
+                privNonSecureWrite(v);
+                privSecureWrite(v);
+                hypWrite(v);
+                monSecureWrite(v);
+                monNonSecureWrite(v);
+                return *this;
+            }
+            chain exceptUserMode() const {
+                user(0);
+                return *this;
+            }
+            MiscRegLUTEntryInitializer(struct MiscRegLUTEntry &e,
+                                       std::bitset<NUM_MISCREG_INFOS> &i)
+              : entry(e),
+                info(i)
+            {
+                // force unimplemented registers to be thusly declared
+                implemented(1);
+            }
         };
 
         const MiscRegLUTEntryInitializer InitReg(uint32_t reg) {
-            return MiscRegLUTEntryInitializer(lookUpMiscReg[reg]);
+            return MiscRegLUTEntryInitializer(lookUpMiscReg[reg],
+                                              miscRegInfo[reg]);
         }
 
         void initializeMiscRegMetadata();
diff --git a/src/arch/arm/miscregs.cc b/src/arch/arm/miscregs.cc
index ece552439..445ba18cf 100644
--- a/src/arch/arm/miscregs.cc
+++ b/src/arch/arm/miscregs.cc
@@ -128,1233 +128,6 @@ decodeCP14Reg(unsigned crn, unsigned opc1, unsigned crm, unsigned opc2)
 
 using namespace std;
 
-bitset<NUM_MISCREG_INFOS> miscRegInfo[NUM_MISCREGS] = {
-    // MISCREG_CPSR
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_SPSR
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_SPSR_FIQ
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_SPSR_IRQ
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_SPSR_SVC
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_SPSR_MON
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_SPSR_ABT
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_SPSR_HYP
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_SPSR_UND
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_ELR_HYP
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_FPSID
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_FPSCR
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_MVFR1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_MVFR0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_FPEXC
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-
-    // Helper registers
-    // MISCREG_CPSR_MODE
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_CPSR_Q
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_FPSCR_Q
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_FPSCR_EXC
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_LOCKADDR
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_LOCKFLAG
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PRRR_MAIR0
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000011001")),
-    // MISCREG_PRRR_MAIR0_NS
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000101001")),
-    // MISCREG_PRRR_MAIR0_S
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000101001")),
-    // MISCREG_NMRR_MAIR1
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000011001")),
-    // MISCREG_NMRR_MAIR1_NS
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000101001")),
-    // MISCREG_NMRR_MAIR1_S
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000101001")),
-    // MISCREG_PMXEVTYPER_PMCCFILTR
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000001001")),
-    // MISCREG_SCTLR_RST
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_SEV_MAILBOX
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-
-    // AArch32 CP14 registers
-    // MISCREG_DBGDIDR
-    bitset<NUM_MISCREG_INFOS>(string("01011111111111000001")),
-    // MISCREG_DBGDSCRint
-    bitset<NUM_MISCREG_INFOS>(string("01011111111111000001")),
-    // MISCREG_DBGDCCINT
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGDTRTXint
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGDTRRXint
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGWFAR
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGVCR
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGDTRRXext
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGDSCRext
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000100")),
-    // MISCREG_DBGDTRTXext
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGOSECCR
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGBVR0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGBVR1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGBVR2
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGBVR3
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGBVR4
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGBVR5
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGBCR0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGBCR1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGBCR2
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGBCR3
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGBCR4
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGBCR5
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGWVR0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGWVR1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGWVR2
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGWVR3
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGWCR0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGWCR1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGWCR2
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGWCR3
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGDRAR
-    bitset<NUM_MISCREG_INFOS>(string("01011111111111000000")),
-    // MISCREG_DBGBXVR4
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGBXVR5
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGOSLAR
-    bitset<NUM_MISCREG_INFOS>(string("10101111111111000000")),
-    // MISCREG_DBGOSLSR
-    bitset<NUM_MISCREG_INFOS>(string("01011111111111000000")),
-    // MISCREG_DBGOSDLR
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGPRCR
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGDSAR
-    bitset<NUM_MISCREG_INFOS>(string("01011111111111000000")),
-    // MISCREG_DBGCLAIMSET
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGCLAIMCLR
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_DBGAUTHSTATUS
-    bitset<NUM_MISCREG_INFOS>(string("01011111111111000000")),
-    // MISCREG_DBGDEVID2
-    bitset<NUM_MISCREG_INFOS>(string("01011111111111000000")),
-    // MISCREG_DBGDEVID1
-    bitset<NUM_MISCREG_INFOS>(string("01011111111111000000")),
-    // MISCREG_DBGDEVID0
-    bitset<NUM_MISCREG_INFOS>(string("01011111111111000000")),
-    // MISCREG_TEECR
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_JIDR
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_TEEHBR
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_JOSCR
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_JMCR
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-
-    // AArch32 CP15 registers
-    // MISCREG_MIDR
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_CTR
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_TCMTR
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_TLBTR
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_MPIDR
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_REVIDR
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000100")),
-    // MISCREG_ID_PFR0
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_PFR1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_DFR0
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_AFR0
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_MMFR0
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_MMFR1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_MMFR2
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_MMFR3
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_ISAR0
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_ISAR1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_ISAR2
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_ISAR3
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_ISAR4
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_ISAR5
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_CCSIDR
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_CLIDR
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_AIDR
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_CSSELR
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000010001")),
-    // MISCREG_CSSELR_NS
-    bitset<NUM_MISCREG_INFOS>(string("11001111110000100001")),
-    // MISCREG_CSSELR_S
-    bitset<NUM_MISCREG_INFOS>(string("00110011000000100001")),
-    // MISCREG_VPIDR
-    bitset<NUM_MISCREG_INFOS>(string("11001100000000000001")),
-    // MISCREG_VMPIDR
-    bitset<NUM_MISCREG_INFOS>(string("11001100000000000001")),
-    // MISCREG_SCTLR
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000010001")),
-    // MISCREG_SCTLR_NS
-    bitset<NUM_MISCREG_INFOS>(string("11001111110000100001")),
-    // MISCREG_SCTLR_S
-    bitset<NUM_MISCREG_INFOS>(string("00110011000000100001")),
-    // MISCREG_ACTLR
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000010001")),
-    // MISCREG_ACTLR_NS
-    bitset<NUM_MISCREG_INFOS>(string("11001111110000100001")),
-    // MISCREG_ACTLR_S
-    bitset<NUM_MISCREG_INFOS>(string("00110011000000100001")),
-    // MISCREG_CPACR
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_SCR
-    bitset<NUM_MISCREG_INFOS>(string("11110011000000000001")),
-    // MISCREG_SDER
-    bitset<NUM_MISCREG_INFOS>(string("11110000000000000001")),
-    // MISCREG_NSACR
-    bitset<NUM_MISCREG_INFOS>(string("11110111010000000001")),
-    // MISCREG_HSCTLR
-    bitset<NUM_MISCREG_INFOS>(string("11001100000000000001")),
-    // MISCREG_HACTLR
-    bitset<NUM_MISCREG_INFOS>(string("11001100000000000001")),
-    // MISCREG_HCR
-    bitset<NUM_MISCREG_INFOS>(string("11001100000000000001")),
-    // MISCREG_HDCR
-    bitset<NUM_MISCREG_INFOS>(string("11001100000000000001")),
-    // MISCREG_HCPTR
-    bitset<NUM_MISCREG_INFOS>(string("11001100000000000001")),
-    // MISCREG_HSTR
-    bitset<NUM_MISCREG_INFOS>(string("11001100000000000001")),
-    // MISCREG_HACR
-    bitset<NUM_MISCREG_INFOS>(string("11001100000000000100")),
-    // MISCREG_TTBR0
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000010001")),
-    // MISCREG_TTBR0_NS
-    bitset<NUM_MISCREG_INFOS>(string("11001111110000100001")),
-    // MISCREG_TTBR0_S
-    bitset<NUM_MISCREG_INFOS>(string("00110011000000100001")),
-    // MISCREG_TTBR1
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000010001")),
-    // MISCREG_TTBR1_NS
-    bitset<NUM_MISCREG_INFOS>(string("11001111110000100001")),
-    // MISCREG_TTBR1_S
-    bitset<NUM_MISCREG_INFOS>(string("00110011000000100001")),
-    // MISCREG_TTBCR
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000010001")),
-    // MISCREG_TTBCR_NS
-    bitset<NUM_MISCREG_INFOS>(string("11001111110000100001")),
-    // MISCREG_TTBCR_S
-    bitset<NUM_MISCREG_INFOS>(string("00110011000000100001")),
-    // MISCREG_HTCR
-    bitset<NUM_MISCREG_INFOS>(string("11001100000000000001")),
-    // MISCREG_VTCR
-    bitset<NUM_MISCREG_INFOS>(string("11001100000000000001")),
-    // MISCREG_DACR
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000010001")),
-    // MISCREG_DACR_NS
-    bitset<NUM_MISCREG_INFOS>(string("11001111110000100001")),
-    // MISCREG_DACR_S
-    bitset<NUM_MISCREG_INFOS>(string("00110011000000100001")),
-    // MISCREG_DFSR
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000010001")),
-    // MISCREG_DFSR_NS
-    bitset<NUM_MISCREG_INFOS>(string("11001111110000100001")),
-    // MISCREG_DFSR_S
-    bitset<NUM_MISCREG_INFOS>(string("00110011000000100001")),
-    // MISCREG_IFSR
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000010001")),
-    // MISCREG_IFSR_NS
-    bitset<NUM_MISCREG_INFOS>(string("11001111110000100001")),
-    // MISCREG_IFSR_S
-    bitset<NUM_MISCREG_INFOS>(string("00110011000000100001")),
-    // MISCREG_ADFSR
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000010100")),
-    // MISCREG_ADFSR_NS
-    bitset<NUM_MISCREG_INFOS>(string("11001111110000100100")),
-    // MISCREG_ADFSR_S
-    bitset<NUM_MISCREG_INFOS>(string("00110011000000100100")),
-    // MISCREG_AIFSR
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000010100")),
-    // MISCREG_AIFSR_NS
-    bitset<NUM_MISCREG_INFOS>(string("11001111110000100100")),
-    // MISCREG_AIFSR_S
-    bitset<NUM_MISCREG_INFOS>(string("00110011000000100100")),
-    // MISCREG_HADFSR
-    bitset<NUM_MISCREG_INFOS>(string("11001100000000000001")),
-    // MISCREG_HAIFSR
-    bitset<NUM_MISCREG_INFOS>(string("11001100000000000001")),
-    // MISCREG_HSR
-    bitset<NUM_MISCREG_INFOS>(string("11001100000000000001")),
-    // MISCREG_DFAR
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000010001")),
-    // MISCREG_DFAR_NS
-    bitset<NUM_MISCREG_INFOS>(string("11001111110000100001")),
-    // MISCREG_DFAR_S
-    bitset<NUM_MISCREG_INFOS>(string("00110011000000100001")),
-    // MISCREG_IFAR
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000010001")),
-    // MISCREG_IFAR_NS
-    bitset<NUM_MISCREG_INFOS>(string("11001111110000100001")),
-    // MISCREG_IFAR_S
-    bitset<NUM_MISCREG_INFOS>(string("00110011000000100001")),
-    // MISCREG_HDFAR
-    bitset<NUM_MISCREG_INFOS>(string("11001100000000000001")),
-    // MISCREG_HIFAR
-    bitset<NUM_MISCREG_INFOS>(string("11001100000000000001")),
-    // MISCREG_HPFAR
-    bitset<NUM_MISCREG_INFOS>(string("11001100000000000001")),
-    // MISCREG_ICIALLUIS
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000100")),
-    // MISCREG_BPIALLIS
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000100")),
-    // MISCREG_PAR
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000010001")),
-    // MISCREG_PAR_NS
-    bitset<NUM_MISCREG_INFOS>(string("11001111110000100001")),
-    // MISCREG_PAR_S
-    bitset<NUM_MISCREG_INFOS>(string("00110011000000100001")),
-    // MISCREG_ICIALLU
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_ICIMVAU
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000100")),
-    // MISCREG_CP15ISB
-    bitset<NUM_MISCREG_INFOS>(string("10101010101010000001")),
-    // MISCREG_BPIALL
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000100")),
-    // MISCREG_BPIMVA
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000100")),
-    // MISCREG_DCIMVAC
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000100")),
-    // MISCREG_DCISW
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000100")),
-    // MISCREG_ATS1CPR
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_ATS1CPW
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_ATS1CUR
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_ATS1CUW
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_ATS12NSOPR
-    bitset<NUM_MISCREG_INFOS>(string("10101010000000000001")),
-    // MISCREG_ATS12NSOPW
-    bitset<NUM_MISCREG_INFOS>(string("10101010000000000001")),
-    // MISCREG_ATS12NSOUR
-    bitset<NUM_MISCREG_INFOS>(string("10101010000000000001")),
-    // MISCREG_ATS12NSOUW
-    bitset<NUM_MISCREG_INFOS>(string("10101010000000000001")),
-    // MISCREG_DCCMVAC
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_DCCSW
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000100")),
-    // MISCREG_CP15DSB
-    bitset<NUM_MISCREG_INFOS>(string("10101010101010000001")),
-    // MISCREG_CP15DMB
-    bitset<NUM_MISCREG_INFOS>(string("10101010101010000001")),
-    // MISCREG_DCCMVAU
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000100")),
-    // MISCREG_DCCIMVAC
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000100")),
-    // MISCREG_DCCISW
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000100")),
-    // MISCREG_ATS1HR
-    bitset<NUM_MISCREG_INFOS>(string("10001000000000000001")),
-    // MISCREG_ATS1HW
-    bitset<NUM_MISCREG_INFOS>(string("10001000000000000001")),
-    // MISCREG_TLBIALLIS
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_TLBIMVAIS
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_TLBIASIDIS
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_TLBIMVAAIS
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_TLBIMVALIS
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000000")),
-    // MISCREG_TLBIMVAALIS
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000000")),
-    // MISCREG_ITLBIALL
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_ITLBIMVA
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_ITLBIASID
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_DTLBIALL
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_DTLBIMVA
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_DTLBIASID
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_TLBIALL
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_TLBIMVA
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_TLBIASID
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_TLBIMVAA
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_TLBIMVAL
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000000")),
-    // MISCREG_TLBIMVAAL
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000000")),
-    // MISCREG_TLBIIPAS2IS
-    bitset<NUM_MISCREG_INFOS>(string("10001000000000000000")),
-    // MISCREG_TLBIIPAS2LIS
-    bitset<NUM_MISCREG_INFOS>(string("10001000000000000000")),
-    // MISCREG_TLBIALLHIS
-    bitset<NUM_MISCREG_INFOS>(string("10001000000000000001")),
-    // MISCREG_TLBIMVAHIS
-    bitset<NUM_MISCREG_INFOS>(string("10001000000000000001")),
-    // MISCREG_TLBIALLNSNHIS
-    bitset<NUM_MISCREG_INFOS>(string("10001000000000000001")),
-    // MISCREG_TLBIMVALHIS
-    bitset<NUM_MISCREG_INFOS>(string("10001000000000000000")),
-    // MISCREG_TLBIIPAS2
-    bitset<NUM_MISCREG_INFOS>(string("10001000000000000000")),
-    // MISCREG_TLBIIPAS2L
-    bitset<NUM_MISCREG_INFOS>(string("10001000000000000000")),
-    // MISCREG_TLBIALLH
-    bitset<NUM_MISCREG_INFOS>(string("10001000000000000001")),
-    // MISCREG_TLBIMVAH
-    bitset<NUM_MISCREG_INFOS>(string("10001000000000000001")),
-    // MISCREG_TLBIALLNSNH
-    bitset<NUM_MISCREG_INFOS>(string("10001000000000000001")),
-    // MISCREG_TLBIMVALH
-    bitset<NUM_MISCREG_INFOS>(string("10001000000000000000")),
-    // MISCREG_PMCR
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMCNTENSET
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMCNTENCLR
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMOVSR
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMSWINC
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMSELR
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMCEID0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMCEID1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMCCNTR
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMXEVTYPER
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMCCFILTR
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMXEVCNTR
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMUSERENR
-    bitset<NUM_MISCREG_INFOS>(string("11111111110101000001")),
-    // MISCREG_PMINTENSET
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_PMINTENCLR
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_PMOVSSET
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000000")),
-    // MISCREG_L2CTLR
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_L2ECTLR
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000000")),
-    // MISCREG_PRRR
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000010001")),
-    // MISCREG_PRRR_NS
-    bitset<NUM_MISCREG_INFOS>(string("11001111110000100001")),
-    // MISCREG_PRRR_S
-    bitset<NUM_MISCREG_INFOS>(string("00110011000000100001")),
-    // MISCREG_MAIR0
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000010001")),
-    // MISCREG_MAIR0_NS
-    bitset<NUM_MISCREG_INFOS>(string("11001111110000100001")),
-    // MISCREG_MAIR0_S
-    bitset<NUM_MISCREG_INFOS>(string("00110011000000100001")),
-    // MISCREG_NMRR
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000010001")),
-    // MISCREG_NMRR_NS
-    bitset<NUM_MISCREG_INFOS>(string("11001111110000100001")),
-    // MISCREG_NMRR_S
-    bitset<NUM_MISCREG_INFOS>(string("00110011000000100001")),
-    // MISCREG_MAIR1
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000010001")),
-    // MISCREG_MAIR1_NS
-    bitset<NUM_MISCREG_INFOS>(string("11001111110000100001")),
-    // MISCREG_MAIR1_S
-    bitset<NUM_MISCREG_INFOS>(string("00110011000000100001")),
-    // MISCREG_AMAIR0
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000010001")),
-    // MISCREG_AMAIR0_NS
-    bitset<NUM_MISCREG_INFOS>(string("11001111110000100001")),
-    // MISCREG_AMAIR0_S
-    bitset<NUM_MISCREG_INFOS>(string("00110011000000100001")),
-    // MISCREG_AMAIR1
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000010001")),
-    // MISCREG_AMAIR1_NS
-    bitset<NUM_MISCREG_INFOS>(string("11001111110000100001")),
-    // MISCREG_AMAIR1_S
-    bitset<NUM_MISCREG_INFOS>(string("00110011000000100001")),
-    // MISCREG_HMAIR0
-    bitset<NUM_MISCREG_INFOS>(string("11001100000000000001")),
-    // MISCREG_HMAIR1
-    bitset<NUM_MISCREG_INFOS>(string("11001100000000000001")),
-    // MISCREG_HAMAIR0
-    bitset<NUM_MISCREG_INFOS>(string("11001100000000000100")),
-    // MISCREG_HAMAIR1
-    bitset<NUM_MISCREG_INFOS>(string("11001100000000000100")),
-    // MISCREG_VBAR
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000010001")),
-    // MISCREG_VBAR_NS
-    bitset<NUM_MISCREG_INFOS>(string("11001111110000100001")),
-    // MISCREG_VBAR_S
-    bitset<NUM_MISCREG_INFOS>(string("00110011000000100001")),
-    // MISCREG_MVBAR
-    bitset<NUM_MISCREG_INFOS>(string("11110011000000000001")),
-    // MISCREG_RMR
-    bitset<NUM_MISCREG_INFOS>(string("11110011000000000000")),
-    // MISCREG_ISR
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_HVBAR
-    bitset<NUM_MISCREG_INFOS>(string("11001100000000000001")),
-    // MISCREG_FCSEIDR
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000100")),
-    // MISCREG_CONTEXTIDR
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000010001")),
-    // MISCREG_CONTEXTIDR_NS
-    bitset<NUM_MISCREG_INFOS>(string("11001111110000100001")),
-    // MISCREG_CONTEXTIDR_S
-    bitset<NUM_MISCREG_INFOS>(string("00110011000000100001")),
-    // MISCREG_TPIDRURW
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000010001")),
-    // MISCREG_TPIDRURW_NS
-    bitset<NUM_MISCREG_INFOS>(string("11001111111111100001")),
-    // MISCREG_TPIDRURW_S
-    bitset<NUM_MISCREG_INFOS>(string("00110011001100100001")),
-    // MISCREG_TPIDRURO
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000010001")),
-    // MISCREG_TPIDRURO_NS
-    bitset<NUM_MISCREG_INFOS>(string("11001111110101100001")),
-    // MISCREG_TPIDRURO_S
-    bitset<NUM_MISCREG_INFOS>(string("00110011000100100001")),
-    // MISCREG_TPIDRPRW
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000010001")),
-    // MISCREG_TPIDRPRW_NS
-    bitset<NUM_MISCREG_INFOS>(string("11001111110000100001")),
-    // MISCREG_TPIDRPRW_S
-    bitset<NUM_MISCREG_INFOS>(string("00110011000000100001")),
-    // MISCREG_HTPIDR
-    bitset<NUM_MISCREG_INFOS>(string("11001100000000000001")),
-    // MISCREG_CNTFRQ
-    bitset<NUM_MISCREG_INFOS>(string("11110101010101000011")),
-    // MISCREG_CNTKCTL
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_CNTP_TVAL
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000010001")),
-    // MISCREG_CNTP_TVAL_NS
-    bitset<NUM_MISCREG_INFOS>(string("11001111111111100001")),
-    // MISCREG_CNTP_TVAL_S
-    bitset<NUM_MISCREG_INFOS>(string("00110011001111100000")),
-    // MISCREG_CNTP_CTL
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000010001")),
-    // MISCREG_CNTP_CTL_NS
-    bitset<NUM_MISCREG_INFOS>(string("11001111111111100001")),
-    // MISCREG_CNTP_CTL_S
-    bitset<NUM_MISCREG_INFOS>(string("00110011001111100000")),
-    // MISCREG_CNTV_TVAL
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_CNTV_CTL
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_CNTHCTL
-    bitset<NUM_MISCREG_INFOS>(string("01001000000000000000")),
-    // MISCREG_CNTHP_TVAL
-    bitset<NUM_MISCREG_INFOS>(string("01001000000000000000")),
-    // MISCREG_CNTHP_CTL
-    bitset<NUM_MISCREG_INFOS>(string("01001000000000000000")),
-    // MISCREG_IL1DATA0
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000000")),
-    // MISCREG_IL1DATA1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000000")),
-    // MISCREG_IL1DATA2
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000000")),
-    // MISCREG_IL1DATA3
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000000")),
-    // MISCREG_DL1DATA0
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000000")),
-    // MISCREG_DL1DATA1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000000")),
-    // MISCREG_DL1DATA2
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000000")),
-    // MISCREG_DL1DATA3
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000000")),
-    // MISCREG_DL1DATA4
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000000")),
-    // MISCREG_RAMINDEX
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000000")),
-    // MISCREG_L2ACTLR
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000000")),
-    // MISCREG_CBAR
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000000")),
-    // MISCREG_HTTBR
-    bitset<NUM_MISCREG_INFOS>(string("11001100000000000001")),
-    // MISCREG_VTTBR
-    bitset<NUM_MISCREG_INFOS>(string("11001100000000000001")),
-    // MISCREG_CNTPCT
-    bitset<NUM_MISCREG_INFOS>(string("01010101010101000001")),
-    // MISCREG_CNTVCT
-    bitset<NUM_MISCREG_INFOS>(string("01010101010101000011")),
-    // MISCREG_CNTP_CVAL
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000010001")),
-    // MISCREG_CNTP_CVAL_NS
-    bitset<NUM_MISCREG_INFOS>(string("11001111111111100001")),
-    // MISCREG_CNTP_CVAL_S
-    bitset<NUM_MISCREG_INFOS>(string("00110011001111100000")),
-    // MISCREG_CNTV_CVAL
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_CNTVOFF
-    bitset<NUM_MISCREG_INFOS>(string("11001100000000000001")),
-    // MISCREG_CNTHP_CVAL
-    bitset<NUM_MISCREG_INFOS>(string("01001000000000000000")),
-    // MISCREG_CPUMERRSR
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000000")),
-    // MISCREG_L2MERRSR
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000100")),
-
-    // AArch64 registers (Op0=2)
-    // MISCREG_MDCCINT_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_OSDTRRX_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_MDSCR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_OSDTRTX_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_OSECCR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_DBGBVR0_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_DBGBVR1_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_DBGBVR2_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_DBGBVR3_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_DBGBVR4_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_DBGBVR5_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_DBGBCR0_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_DBGBCR1_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_DBGBCR2_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_DBGBCR3_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_DBGBCR4_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_DBGBCR5_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_DBGWVR0_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_DBGWVR1_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_DBGWVR2_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_DBGWVR3_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_DBGWCR0_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_DBGWCR1_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_DBGWCR2_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_DBGWCR3_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_MDCCSR_EL0
-    bitset<NUM_MISCREG_INFOS>(string("01011111111111000001")),
-    // MISCREG_MDDTR_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_MDDTRTX_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_MDDTRRX_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_DBGVCR32_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_MDRAR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01011111111111000001")),
-    // MISCREG_OSLAR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("10101111111111000001")),
-    // MISCREG_OSLSR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01011111111111000001")),
-    // MISCREG_OSDLR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_DBGPRCR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_DBGCLAIMSET_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_DBGCLAIMCLR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_DBGAUTHSTATUS_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01011111111111000001")),
-    // MISCREG_TEECR32_EL1
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000000001")),
-    // MISCREG_TEEHBR32_EL1
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000000001")),
-
-    // AArch64 registers (Op0=1,3)
-    // MISCREG_MIDR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_MPIDR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_REVIDR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_PFR0_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_PFR1_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_DFR0_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_AFR0_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_MMFR0_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_MMFR1_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_MMFR2_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_MMFR3_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_ISAR0_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_ISAR1_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_ISAR2_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_ISAR3_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_ISAR4_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_ISAR5_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_MVFR0_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_MVFR1_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_MVFR2_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_AA64PFR0_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_AA64PFR1_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_AA64DFR0_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_AA64DFR1_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_AA64AFR0_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_AA64AFR1_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_AA64ISAR0_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_AA64ISAR1_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_AA64MMFR0_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ID_AA64MMFR1_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_CCSIDR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_CLIDR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_AIDR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_CSSELR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_CTR_EL0
-    bitset<NUM_MISCREG_INFOS>(string("01010101010101000001")),
-    // MISCREG_DCZID_EL0
-    bitset<NUM_MISCREG_INFOS>(string("01010101010101000001")),
-    // MISCREG_VPIDR_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_VMPIDR_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_SCTLR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_ACTLR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_CPACR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_SCTLR_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_ACTLR_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_HCR_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_MDCR_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_CPTR_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_HSTR_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_HACR_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_SCTLR_EL3
-    bitset<NUM_MISCREG_INFOS>(string("11110000000000000001")),
-    // MISCREG_ACTLR_EL3
-    bitset<NUM_MISCREG_INFOS>(string("11110000000000000001")),
-    // MISCREG_SCR_EL3
-    bitset<NUM_MISCREG_INFOS>(string("11110000000000000001")),
-    // MISCREG_SDER32_EL3
-    bitset<NUM_MISCREG_INFOS>(string("11110000000000000001")),
-    // MISCREG_CPTR_EL3
-    bitset<NUM_MISCREG_INFOS>(string("11110000000000000001")),
-    // MISCREG_MDCR_EL3
-    bitset<NUM_MISCREG_INFOS>(string("11110000000000000001")),
-    // MISCREG_TTBR0_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_TTBR1_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_TCR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_TTBR0_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_TCR_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_VTTBR_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_VTCR_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_TTBR0_EL3
-    bitset<NUM_MISCREG_INFOS>(string("11110000000000000001")),
-    // MISCREG_TCR_EL3
-    bitset<NUM_MISCREG_INFOS>(string("11110000000000000001")),
-    // MISCREG_DACR32_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_SPSR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_ELR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_SP_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_SPSEL
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_CURRENTEL
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_NZCV
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_DAIF
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_FPCR
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_FPSR
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_DSPSR_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_DLR_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_SPSR_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_ELR_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_SP_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_SPSR_IRQ_AA64
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_SPSR_ABT_AA64
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_SPSR_UND_AA64
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_SPSR_FIQ_AA64
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_SPSR_EL3
-    bitset<NUM_MISCREG_INFOS>(string("11110000000000000001")),
-    // MISCREG_ELR_EL3
-    bitset<NUM_MISCREG_INFOS>(string("11110000000000000001")),
-    // MISCREG_SP_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11110000000000000001")),
-    // MISCREG_AFSR0_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_AFSR1_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_ESR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_IFSR32_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_AFSR0_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_AFSR1_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_ESR_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_FPEXC32_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_AFSR0_EL3
-    bitset<NUM_MISCREG_INFOS>(string("11110000000000000001")),
-    // MISCREG_AFSR1_EL3
-    bitset<NUM_MISCREG_INFOS>(string("11110000000000000001")),
-    // MISCREG_ESR_EL3
-    bitset<NUM_MISCREG_INFOS>(string("11110000000000000001")),
-    // MISCREG_FAR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_FAR_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_HPFAR_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_FAR_EL3
-    bitset<NUM_MISCREG_INFOS>(string("11110000000000000001")),
-    // MISCREG_IC_IALLUIS
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000101")),
-    // MISCREG_PAR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_IC_IALLU
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000101")),
-    // MISCREG_DC_IVAC_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101010101010000101")),
-    // MISCREG_DC_ISW_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000101")),
-    // MISCREG_AT_S1E1R_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_AT_S1E1W_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_AT_S1E0R_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_AT_S1E0W_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_DC_CSW_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000101")),
-    // MISCREG_DC_CISW_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000101")),
-    // MISCREG_DC_ZVA_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101010100010000101")),
-    // MISCREG_IC_IVAU_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101010101010000001")),
-    // MISCREG_DC_CVAC_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101010101010000101")),
-    // MISCREG_DC_CVAU_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101010101010000101")),
-    // MISCREG_DC_CIVAC_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101010101010000101")),
-    // MISCREG_AT_S1E2R_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10001000000000000001")),
-    // MISCREG_AT_S1E2W_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10001000000000000001")),
-    // MISCREG_AT_S12E1R_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101000000000000001")),
-    // MISCREG_AT_S12E1W_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101000000000000001")),
-    // MISCREG_AT_S12E0R_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101000000000000001")),
-    // MISCREG_AT_S12E0W_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101000000000000001")),
-    // MISCREG_AT_S1E3R_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10100000000000000001")),
-    // MISCREG_AT_S1E3W_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10100000000000000001")),
-    // MISCREG_TLBI_VMALLE1IS
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_TLBI_VAE1IS_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_TLBI_ASIDE1IS_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_TLBI_VAAE1IS_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_TLBI_VALE1IS_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_TLBI_VAALE1IS_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_TLBI_VMALLE1
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_TLBI_VAE1_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_TLBI_ASIDE1_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_TLBI_VAAE1_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_TLBI_VALE1_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_TLBI_VAALE1_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101010100000000001")),
-    // MISCREG_TLBI_IPAS2E1IS_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101000000000000001")),
-    // MISCREG_TLBI_IPAS2LE1IS_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101000000000000001")),
-    // MISCREG_TLBI_ALLE2IS
-    bitset<NUM_MISCREG_INFOS>(string("10001000000000000001")),
-    // MISCREG_TLBI_VAE2IS_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10001000000000000001")),
-    // MISCREG_TLBI_ALLE1IS
-    bitset<NUM_MISCREG_INFOS>(string("10101000000000000001")),
-    // MISCREG_TLBI_VALE2IS_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10001000000000000001")),
-    // MISCREG_TLBI_VMALLS12E1IS
-    bitset<NUM_MISCREG_INFOS>(string("10101000000000000001")),
-    // MISCREG_TLBI_IPAS2E1_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101000000000000001")),
-    // MISCREG_TLBI_IPAS2LE1_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10101000000000000001")),
-    // MISCREG_TLBI_ALLE2
-    bitset<NUM_MISCREG_INFOS>(string("10001000000000000001")),
-    // MISCREG_TLBI_VAE2_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10001000000000000001")),
-    // MISCREG_TLBI_ALLE1
-    bitset<NUM_MISCREG_INFOS>(string("10101000000000000001")),
-    // MISCREG_TLBI_VALE2_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10001000000000000001")),
-    // MISCREG_TLBI_VMALLS12E1
-    bitset<NUM_MISCREG_INFOS>(string("10101000000000000001")),
-    // MISCREG_TLBI_ALLE3IS
-    bitset<NUM_MISCREG_INFOS>(string("10100000000000000001")),
-    // MISCREG_TLBI_VAE3IS_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10100000000000000001")),
-    // MISCREG_TLBI_VALE3IS_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10100000000000000001")),
-    // MISCREG_TLBI_ALLE3
-    bitset<NUM_MISCREG_INFOS>(string("10100000000000000001")),
-    // MISCREG_TLBI_VAE3_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10100000000000000001")),
-    // MISCREG_TLBI_VALE3_Xt
-    bitset<NUM_MISCREG_INFOS>(string("10100000000000000001")),
-    // MISCREG_PMINTENSET_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_PMINTENCLR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_PMCR_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMCNTENSET_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMCNTENCLR_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMOVSCLR_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMSWINC_EL0
-    bitset<NUM_MISCREG_INFOS>(string("10101010101111000001")),
-    // MISCREG_PMSELR_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMCEID0_EL0
-    bitset<NUM_MISCREG_INFOS>(string("01010101011111000001")),
-    // MISCREG_PMCEID1_EL0
-    bitset<NUM_MISCREG_INFOS>(string("01010101011111000001")),
-    // MISCREG_PMCCNTR_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMXEVTYPER_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMCCFILTR_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMXEVCNTR_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMUSERENR_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111110101000001")),
-    // MISCREG_PMOVSSET_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_MAIR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_AMAIR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_MAIR_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_AMAIR_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_MAIR_EL3
-    bitset<NUM_MISCREG_INFOS>(string("11110000000000000001")),
-    // MISCREG_AMAIR_EL3
-    bitset<NUM_MISCREG_INFOS>(string("11110000000000000001")),
-    // MISCREG_L2CTLR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_L2ECTLR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_VBAR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_RVBAR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_ISR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_VBAR_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_RVBAR_EL2
-    bitset<NUM_MISCREG_INFOS>(string("01010100000000000001")),
-    // MISCREG_VBAR_EL3
-    bitset<NUM_MISCREG_INFOS>(string("11110000000000000001")),
-    // MISCREG_RVBAR_EL3
-    bitset<NUM_MISCREG_INFOS>(string("01010000000000000001")),
-    // MISCREG_RMR_EL3
-    bitset<NUM_MISCREG_INFOS>(string("11110000000000000001")),
-    // MISCREG_CONTEXTIDR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_TPIDR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_TPIDR_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_TPIDRRO_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111110101000001")),
-    // MISCREG_TPIDR_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_TPIDR_EL3
-    bitset<NUM_MISCREG_INFOS>(string("11110000000000000001")),
-    // MISCREG_CNTKCTL_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_CNTFRQ_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11110101010101000001")),
-    // MISCREG_CNTPCT_EL0
-    bitset<NUM_MISCREG_INFOS>(string("01010101010101000001")),
-    // MISCREG_CNTVCT_EL0
-    bitset<NUM_MISCREG_INFOS>(string("01010101010101000011")),
-    // MISCREG_CNTP_TVAL_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_CNTP_CTL_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_CNTP_CVAL_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_CNTV_TVAL_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_CNTV_CTL_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_CNTV_CVAL_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMEVCNTR0_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMEVCNTR1_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMEVCNTR2_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMEVCNTR3_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMEVCNTR4_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMEVCNTR5_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMEVTYPER0_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMEVTYPER1_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMEVTYPER2_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMEVTYPER3_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMEVTYPER4_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_PMEVTYPER5_EL0
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_CNTVOFF_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-    // MISCREG_CNTHCTL_EL2
-    bitset<NUM_MISCREG_INFOS>(string("01111000000000000100")),
-    // MISCREG_CNTHP_TVAL_EL2
-    bitset<NUM_MISCREG_INFOS>(string("01111000000000000000")),
-    // MISCREG_CNTHP_CTL_EL2
-    bitset<NUM_MISCREG_INFOS>(string("01111000000000000000")),
-    // MISCREG_CNTHP_CVAL_EL2
-    bitset<NUM_MISCREG_INFOS>(string("01111000000000000000")),
-    // MISCREG_CNTPS_TVAL_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01111000000000000000")),
-    // MISCREG_CNTPS_CTL_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01111000000000000000")),
-    // MISCREG_CNTPS_CVAL_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01111000000000000000")),
-    // MISCREG_IL1DATA0_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_IL1DATA1_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_IL1DATA2_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_IL1DATA3_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_DL1DATA0_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_DL1DATA1_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_DL1DATA2_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_DL1DATA3_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_DL1DATA4_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_L2ACTLR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_CPUACTLR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_CPUECTLR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_CPUMERRSR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000001")),
-    // MISCREG_L2MERRSR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("11111111110000000100")),
-    // MISCREG_CBAR_EL1
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_CONTEXTIDR_EL2
-    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
-
-    // Dummy registers
-    // MISCREG_NOP
-    bitset<NUM_MISCREG_INFOS>(string("11111111111111000001")),
-    // MISCREG_RAZ
-    bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
-    // MISCREG_CP14_UNIMPL
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000000100")),
-    // MISCREG_CP15_UNIMPL
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000000100")),
-    // MISCREG_A64_UNIMPL
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000000100")),
-    // MISCREG_UNKNOWN
-    bitset<NUM_MISCREG_INFOS>(string("00000000000000000001"))
-};
-
 MiscRegIndex
 decodeCP15Reg(unsigned crn, unsigned opc1, unsigned crm, unsigned opc2)
 {
@@ -3561,4 +2334,1600 @@ decodeAArch64SysReg(unsigned op0, unsigned op1,
     return MISCREG_UNKNOWN;
 }
 
+bitset<NUM_MISCREG_INFOS> miscRegInfo[NUM_MISCREGS]; // initialized below
+
+void
+ISA::initializeMiscRegMetadata()
+{
+    // the MiscReg metadata tables are shared across all instances of the
+    // ISA object, so there's no need to initialize them multiple times.
+    static bool completed = false;
+    if (completed)
+        return;
+
+    /**
+     * Some registers alias with others, and therefore need to be translated.
+     * When two mapping registers are given, they are the 32b lower and
+     * upper halves, respectively, of the 64b register being mapped.
+     * aligned with reference documentation ARM DDI 0487A.i pp 1540-1543
+     *
+     * NAM = "not architecturally mandated",
+     * from ARM DDI 0487A.i, template text
+     * "AArch64 System register ___ can be mapped to
+     *  AArch32 System register ___, but this is not
+     *  architecturally mandated."
+     */
+
+    InitReg(MISCREG_CPSR)
+      .allPrivileges();
+    InitReg(MISCREG_SPSR)
+      .allPrivileges();
+    InitReg(MISCREG_SPSR_FIQ)
+      .allPrivileges();
+    InitReg(MISCREG_SPSR_IRQ)
+      .allPrivileges();
+    InitReg(MISCREG_SPSR_SVC)
+      .allPrivileges();
+    InitReg(MISCREG_SPSR_MON)
+      .allPrivileges();
+    InitReg(MISCREG_SPSR_ABT)
+      .allPrivileges();
+    InitReg(MISCREG_SPSR_HYP)
+      .allPrivileges();
+    InitReg(MISCREG_SPSR_UND)
+      .allPrivileges();
+    InitReg(MISCREG_ELR_HYP)
+      .allPrivileges();
+    InitReg(MISCREG_FPSID)
+      .allPrivileges();
+    InitReg(MISCREG_FPSCR)
+      .allPrivileges();
+    InitReg(MISCREG_MVFR1)
+      .allPrivileges();
+    InitReg(MISCREG_MVFR0)
+      .allPrivileges();
+    InitReg(MISCREG_FPEXC)
+      .allPrivileges();
+
+    // Helper registers
+    InitReg(MISCREG_CPSR_MODE)
+      .allPrivileges();
+    InitReg(MISCREG_CPSR_Q)
+      .allPrivileges();
+    InitReg(MISCREG_FPSCR_EXC)
+      .allPrivileges();
+    InitReg(MISCREG_FPSCR_QC)
+      .allPrivileges();
+    InitReg(MISCREG_LOCKADDR)
+      .allPrivileges();
+    InitReg(MISCREG_LOCKFLAG)
+      .allPrivileges();
+    InitReg(MISCREG_PRRR_MAIR0)
+      .mutex()
+      .banked();
+    InitReg(MISCREG_PRRR_MAIR0_NS)
+      .mutex()
+      .bankedChild();
+    InitReg(MISCREG_PRRR_MAIR0_S)
+      .mutex()
+      .bankedChild();
+    InitReg(MISCREG_NMRR_MAIR1)
+      .mutex()
+      .banked();
+    InitReg(MISCREG_NMRR_MAIR1_NS)
+      .mutex()
+      .bankedChild();
+    InitReg(MISCREG_NMRR_MAIR1_S)
+      .mutex()
+      .bankedChild();
+    InitReg(MISCREG_PMXEVTYPER_PMCCFILTR)
+      .mutex();
+    InitReg(MISCREG_SCTLR_RST)
+      .allPrivileges();
+    InitReg(MISCREG_SEV_MAILBOX)
+      .allPrivileges();
+
+    // AArch32 CP14 registers
+    InitReg(MISCREG_DBGDIDR)
+      .allPrivileges().monSecureWrite(0).monNonSecureWrite(0);
+    InitReg(MISCREG_DBGDSCRint)
+      .allPrivileges().monSecureWrite(0).monNonSecureWrite(0);
+    InitReg(MISCREG_DBGDCCINT)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGDTRTXint)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGDTRRXint)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGWFAR)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGVCR)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGDTRRXext)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGDSCRext)
+      .unimplemented()
+      .warnNotFail()
+      .allPrivileges();
+    InitReg(MISCREG_DBGDTRTXext)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGOSECCR)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGBVR0)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGBVR1)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGBVR2)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGBVR3)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGBVR4)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGBVR5)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGBCR0)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGBCR1)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGBCR2)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGBCR3)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGBCR4)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGBCR5)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGWVR0)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGWVR1)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGWVR2)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGWVR3)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGWCR0)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGWCR1)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGWCR2)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGWCR3)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGDRAR)
+      .unimplemented()
+      .allPrivileges().monSecureWrite(0).monNonSecureWrite(0);
+    InitReg(MISCREG_DBGBXVR4)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGBXVR5)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGOSLAR)
+      .unimplemented()
+      .allPrivileges().monSecureRead(0).monNonSecureRead(0);
+    InitReg(MISCREG_DBGOSLSR)
+      .unimplemented()
+      .allPrivileges().monSecureWrite(0).monNonSecureWrite(0);
+    InitReg(MISCREG_DBGOSDLR)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGPRCR)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGDSAR)
+      .unimplemented()
+      .allPrivileges().monSecureWrite(0).monNonSecureWrite(0);
+    InitReg(MISCREG_DBGCLAIMSET)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGCLAIMCLR)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_DBGAUTHSTATUS)
+      .unimplemented()
+      .allPrivileges().monSecureWrite(0).monNonSecureWrite(0);
+    InitReg(MISCREG_DBGDEVID2)
+      .unimplemented()
+      .allPrivileges().monSecureWrite(0).monNonSecureWrite(0);
+    InitReg(MISCREG_DBGDEVID1)
+      .unimplemented()
+      .allPrivileges().monSecureWrite(0).monNonSecureWrite(0);
+    InitReg(MISCREG_DBGDEVID0)
+      .unimplemented()
+      .allPrivileges().monSecureWrite(0).monNonSecureWrite(0);
+    InitReg(MISCREG_TEECR)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_JIDR)
+      .allPrivileges();
+    InitReg(MISCREG_TEEHBR)
+      .allPrivileges();
+    InitReg(MISCREG_JOSCR)
+      .allPrivileges();
+    InitReg(MISCREG_JMCR)
+      .allPrivileges();
+
+    // AArch32 CP15 registers
+    InitReg(MISCREG_MIDR)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_CTR)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_TCMTR)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_TLBTR)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_MPIDR)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_REVIDR)
+      .unimplemented()
+      .warnNotFail()
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_PFR0)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_PFR1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_DFR0)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_AFR0)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_MMFR0)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_MMFR1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_MMFR2)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_MMFR3)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_ISAR0)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_ISAR1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_ISAR2)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_ISAR3)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_ISAR4)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_ISAR5)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_CCSIDR)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_CLIDR)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_AIDR)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_CSSELR)
+      .banked();
+    InitReg(MISCREG_CSSELR_NS)
+      .bankedChild()
+      .nonSecure().exceptUserMode();
+    InitReg(MISCREG_CSSELR_S)
+      .bankedChild()
+      .secure().exceptUserMode();
+    InitReg(MISCREG_VPIDR)
+      .hyp().monNonSecure();
+    InitReg(MISCREG_VMPIDR)
+      .hyp().monNonSecure();
+    InitReg(MISCREG_SCTLR)
+      .banked();
+    InitReg(MISCREG_SCTLR_NS)
+      .bankedChild()
+      .nonSecure().exceptUserMode();
+    InitReg(MISCREG_SCTLR_S)
+      .bankedChild()
+      .secure().exceptUserMode();
+    InitReg(MISCREG_ACTLR)
+      .banked();
+    InitReg(MISCREG_ACTLR_NS)
+      .bankedChild()
+      .nonSecure().exceptUserMode();
+    InitReg(MISCREG_ACTLR_S)
+      .bankedChild()
+      .secure().exceptUserMode();
+    InitReg(MISCREG_CPACR)
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_SCR)
+      .mon().secure().exceptUserMode()
+      .res0(0xff40)  // [31:16], [6]
+      .res1(0x0030); // [5:4]
+    InitReg(MISCREG_SDER)
+      .mon();
+    InitReg(MISCREG_NSACR)
+      .allPrivileges().hypWrite(0).privNonSecureWrite(0).exceptUserMode();
+    InitReg(MISCREG_HSCTLR)
+      .hyp().monNonSecure();
+    InitReg(MISCREG_HACTLR)
+      .hyp().monNonSecure();
+    InitReg(MISCREG_HCR)
+      .hyp().monNonSecure();
+    InitReg(MISCREG_HDCR)
+      .hyp().monNonSecure();
+    InitReg(MISCREG_HCPTR)
+      .hyp().monNonSecure();
+    InitReg(MISCREG_HSTR)
+      .hyp().monNonSecure();
+    InitReg(MISCREG_HACR)
+      .unimplemented()
+      .warnNotFail()
+      .hyp().monNonSecure();
+    InitReg(MISCREG_TTBR0)
+      .banked();
+    InitReg(MISCREG_TTBR0_NS)
+      .bankedChild()
+      .nonSecure().exceptUserMode();
+    InitReg(MISCREG_TTBR0_S)
+      .bankedChild()
+      .secure().exceptUserMode();
+    InitReg(MISCREG_TTBR1)
+      .banked();
+    InitReg(MISCREG_TTBR1_NS)
+      .bankedChild()
+      .nonSecure().exceptUserMode();
+    InitReg(MISCREG_TTBR1_S)
+      .bankedChild()
+      .secure().exceptUserMode();
+    InitReg(MISCREG_TTBCR)
+      .banked();
+    InitReg(MISCREG_TTBCR_NS)
+      .bankedChild()
+      .nonSecure().exceptUserMode();
+    InitReg(MISCREG_TTBCR_S)
+      .bankedChild()
+      .secure().exceptUserMode();
+    InitReg(MISCREG_HTCR)
+      .hyp().monNonSecure();
+    InitReg(MISCREG_VTCR)
+      .hyp().monNonSecure();
+    InitReg(MISCREG_DACR)
+      .banked();
+    InitReg(MISCREG_DACR_NS)
+      .bankedChild()
+      .nonSecure().exceptUserMode();
+    InitReg(MISCREG_DACR_S)
+      .bankedChild()
+      .secure().exceptUserMode();
+    InitReg(MISCREG_DFSR)
+      .banked();
+    InitReg(MISCREG_DFSR_NS)
+      .bankedChild()
+      .nonSecure().exceptUserMode();
+    InitReg(MISCREG_DFSR_S)
+      .bankedChild()
+      .secure().exceptUserMode();
+    InitReg(MISCREG_IFSR)
+      .banked();
+    InitReg(MISCREG_IFSR_NS)
+      .bankedChild()
+      .nonSecure().exceptUserMode();
+    InitReg(MISCREG_IFSR_S)
+      .bankedChild()
+      .secure().exceptUserMode();
+    InitReg(MISCREG_ADFSR)
+      .unimplemented()
+      .warnNotFail()
+      .banked();
+    InitReg(MISCREG_ADFSR_NS)
+      .unimplemented()
+      .warnNotFail()
+      .bankedChild()
+      .nonSecure().exceptUserMode();
+    InitReg(MISCREG_ADFSR_S)
+      .unimplemented()
+      .warnNotFail()
+      .bankedChild()
+      .secure().exceptUserMode();
+    InitReg(MISCREG_AIFSR)
+      .unimplemented()
+      .warnNotFail()
+      .banked();
+    InitReg(MISCREG_AIFSR_NS)
+      .unimplemented()
+      .warnNotFail()
+      .bankedChild()
+      .nonSecure().exceptUserMode();
+    InitReg(MISCREG_AIFSR_S)
+      .unimplemented()
+      .warnNotFail()
+      .bankedChild()
+      .secure().exceptUserMode();
+    InitReg(MISCREG_HADFSR)
+      .hyp().monNonSecure();
+    InitReg(MISCREG_HAIFSR)
+      .hyp().monNonSecure();
+    InitReg(MISCREG_HSR)
+      .hyp().monNonSecure();
+    InitReg(MISCREG_DFAR)
+      .banked();
+    InitReg(MISCREG_DFAR_NS)
+      .bankedChild()
+      .nonSecure().exceptUserMode();
+    InitReg(MISCREG_DFAR_S)
+      .bankedChild()
+      .secure().exceptUserMode();
+    InitReg(MISCREG_IFAR)
+      .banked();
+    InitReg(MISCREG_IFAR_NS)
+      .bankedChild()
+      .nonSecure().exceptUserMode();
+    InitReg(MISCREG_IFAR_S)
+      .bankedChild()
+      .secure().exceptUserMode();
+    InitReg(MISCREG_HDFAR)
+      .hyp().monNonSecure();
+    InitReg(MISCREG_HIFAR)
+      .hyp().monNonSecure();
+    InitReg(MISCREG_HPFAR)
+      .hyp().monNonSecure();
+    InitReg(MISCREG_ICIALLUIS)
+      .unimplemented()
+      .warnNotFail()
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_BPIALLIS)
+      .unimplemented()
+      .warnNotFail()
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_PAR)
+      .banked();
+    InitReg(MISCREG_PAR_NS)
+      .bankedChild()
+      .nonSecure().exceptUserMode();
+    InitReg(MISCREG_PAR_S)
+      .bankedChild()
+      .secure().exceptUserMode();
+    InitReg(MISCREG_ICIALLU)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_ICIMVAU)
+      .unimplemented()
+      .warnNotFail()
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_CP15ISB)
+      .writes(1);
+    InitReg(MISCREG_BPIALL)
+      .unimplemented()
+      .warnNotFail()
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_BPIMVA)
+      .unimplemented()
+      .warnNotFail()
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_DCIMVAC)
+      .unimplemented()
+      .warnNotFail()
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_DCISW)
+      .unimplemented()
+      .warnNotFail()
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_ATS1CPR)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_ATS1CPW)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_ATS1CUR)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_ATS1CUW)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_ATS12NSOPR)
+      .privSecureWrite().hypWrite().monSecureWrite().monNonSecureWrite();
+    InitReg(MISCREG_ATS12NSOPW)
+      .privSecureWrite().hypWrite().monSecureWrite().monNonSecureWrite();
+    InitReg(MISCREG_ATS12NSOUR)
+      .privSecureWrite().hypWrite().monSecureWrite().monNonSecureWrite();
+    InitReg(MISCREG_ATS12NSOUW)
+      .privSecureWrite().hypWrite().monSecureWrite().monNonSecureWrite();
+    InitReg(MISCREG_DCCMVAC)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_DCCSW)
+      .unimplemented()
+      .warnNotFail()
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_CP15DSB)
+      .writes(1);
+    InitReg(MISCREG_CP15DMB)
+      .writes(1);
+    InitReg(MISCREG_DCCMVAU)
+      .unimplemented()
+      .warnNotFail()
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_DCCIMVAC)
+      .unimplemented()
+      .warnNotFail()
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_DCCISW)
+      .unimplemented()
+      .warnNotFail()
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_ATS1HR)
+      .monNonSecureWrite().hypWrite();
+    InitReg(MISCREG_ATS1HW)
+      .monNonSecureWrite().hypWrite();
+    InitReg(MISCREG_TLBIALLIS)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_TLBIMVAIS)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_TLBIASIDIS)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_TLBIMVAAIS)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_TLBIMVALIS)
+      .unimplemented()
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_TLBIMVAALIS)
+      .unimplemented()
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_ITLBIALL)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_ITLBIMVA)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_ITLBIASID)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_DTLBIALL)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_DTLBIMVA)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_DTLBIASID)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_TLBIALL)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_TLBIMVA)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_TLBIASID)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_TLBIMVAA)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_TLBIMVAL)
+      .unimplemented()
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_TLBIMVAAL)
+      .unimplemented()
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_TLBIIPAS2IS)
+      .unimplemented()
+      .monNonSecureWrite().hypWrite();
+    InitReg(MISCREG_TLBIIPAS2LIS)
+      .unimplemented()
+      .monNonSecureWrite().hypWrite();
+    InitReg(MISCREG_TLBIALLHIS)
+      .monNonSecureWrite().hypWrite();
+    InitReg(MISCREG_TLBIMVAHIS)
+      .monNonSecureWrite().hypWrite();
+    InitReg(MISCREG_TLBIALLNSNHIS)
+      .monNonSecureWrite().hypWrite();
+    InitReg(MISCREG_TLBIMVALHIS)
+      .unimplemented()
+      .monNonSecureWrite().hypWrite();
+    InitReg(MISCREG_TLBIIPAS2)
+      .unimplemented()
+      .monNonSecureWrite().hypWrite();
+    InitReg(MISCREG_TLBIIPAS2L)
+      .unimplemented()
+      .monNonSecureWrite().hypWrite();
+    InitReg(MISCREG_TLBIALLH)
+      .monNonSecureWrite().hypWrite();
+    InitReg(MISCREG_TLBIMVAH)
+      .monNonSecureWrite().hypWrite();
+    InitReg(MISCREG_TLBIALLNSNH)
+      .monNonSecureWrite().hypWrite();
+    InitReg(MISCREG_TLBIMVALH)
+      .unimplemented()
+      .monNonSecureWrite().hypWrite();
+    InitReg(MISCREG_PMCR)
+      .allPrivileges();
+    InitReg(MISCREG_PMCNTENSET)
+      .allPrivileges();
+    InitReg(MISCREG_PMCNTENCLR)
+      .allPrivileges();
+    InitReg(MISCREG_PMOVSR)
+      .allPrivileges();
+    InitReg(MISCREG_PMSWINC)
+      .allPrivileges();
+    InitReg(MISCREG_PMSELR)
+      .allPrivileges();
+    InitReg(MISCREG_PMCEID0)
+      .allPrivileges();
+    InitReg(MISCREG_PMCEID1)
+      .allPrivileges();
+    InitReg(MISCREG_PMCCNTR)
+      .allPrivileges();
+    InitReg(MISCREG_PMXEVTYPER)
+      .allPrivileges();
+    InitReg(MISCREG_PMCCFILTR)
+      .allPrivileges();
+    InitReg(MISCREG_PMXEVCNTR)
+      .allPrivileges();
+    InitReg(MISCREG_PMUSERENR)
+      .allPrivileges().userNonSecureWrite(0).userSecureWrite(0);
+    InitReg(MISCREG_PMINTENSET)
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_PMINTENCLR)
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_PMOVSSET)
+      .unimplemented()
+      .allPrivileges();
+    InitReg(MISCREG_L2CTLR)
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_L2ECTLR)
+      .unimplemented()
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_PRRR)
+      .banked();
+    InitReg(MISCREG_PRRR_NS)
+      .bankedChild()
+      .nonSecure().exceptUserMode();
+    InitReg(MISCREG_PRRR_S)
+      .bankedChild()
+      .secure().exceptUserMode();
+    InitReg(MISCREG_MAIR0)
+      .banked();
+    InitReg(MISCREG_MAIR0_NS)
+      .bankedChild()
+      .nonSecure().exceptUserMode();
+    InitReg(MISCREG_MAIR0_S)
+      .bankedChild()
+      .secure().exceptUserMode();
+    InitReg(MISCREG_NMRR)
+      .banked();
+    InitReg(MISCREG_NMRR_NS)
+      .bankedChild()
+      .nonSecure().exceptUserMode();
+    InitReg(MISCREG_NMRR_S)
+      .bankedChild()
+      .secure().exceptUserMode();
+    InitReg(MISCREG_MAIR1)
+      .banked();
+    InitReg(MISCREG_MAIR1_NS)
+      .bankedChild()
+      .nonSecure().exceptUserMode();
+    InitReg(MISCREG_MAIR1_S)
+      .bankedChild()
+      .secure().exceptUserMode();
+    InitReg(MISCREG_AMAIR0)
+      .banked();
+    InitReg(MISCREG_AMAIR0_NS)
+      .bankedChild()
+      .nonSecure().exceptUserMode();
+    InitReg(MISCREG_AMAIR0_S)
+      .bankedChild()
+      .secure().exceptUserMode();
+    InitReg(MISCREG_AMAIR1)
+      .banked();
+    InitReg(MISCREG_AMAIR1_NS)
+      .bankedChild()
+      .nonSecure().exceptUserMode();
+    InitReg(MISCREG_AMAIR1_S)
+      .bankedChild()
+      .secure().exceptUserMode();
+    InitReg(MISCREG_HMAIR0)
+      .hyp().monNonSecure();
+    InitReg(MISCREG_HMAIR1)
+      .hyp().monNonSecure();
+    InitReg(MISCREG_HAMAIR0)
+      .unimplemented()
+      .warnNotFail()
+      .hyp().monNonSecure();
+    InitReg(MISCREG_HAMAIR1)
+      .unimplemented()
+      .warnNotFail()
+      .hyp().monNonSecure();
+    InitReg(MISCREG_VBAR)
+      .banked();
+    InitReg(MISCREG_VBAR_NS)
+      .bankedChild()
+      .nonSecure().exceptUserMode();
+    InitReg(MISCREG_VBAR_S)
+      .bankedChild()
+      .secure().exceptUserMode();
+    InitReg(MISCREG_MVBAR)
+      .mon().secure().exceptUserMode();
+    InitReg(MISCREG_RMR)
+      .unimplemented()
+      .mon().secure().exceptUserMode();
+    InitReg(MISCREG_ISR)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_HVBAR)
+      .hyp().monNonSecure();
+    InitReg(MISCREG_FCSEIDR)
+      .unimplemented()
+      .warnNotFail()
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_CONTEXTIDR)
+      .banked();
+    InitReg(MISCREG_CONTEXTIDR_NS)
+      .bankedChild()
+      .nonSecure().exceptUserMode();
+    InitReg(MISCREG_CONTEXTIDR_S)
+      .bankedChild()
+      .secure().exceptUserMode();
+    InitReg(MISCREG_TPIDRURW)
+      .banked();
+    InitReg(MISCREG_TPIDRURW_NS)
+      .bankedChild()
+      .allPrivileges().monSecure(0).privSecure(0);
+    InitReg(MISCREG_TPIDRURW_S)
+      .bankedChild()
+      .secure();
+    InitReg(MISCREG_TPIDRURO)
+      .banked();
+    InitReg(MISCREG_TPIDRURO_NS)
+      .bankedChild()
+      .allPrivileges().secure(0).userNonSecureWrite(0).userSecureRead(1);
+    InitReg(MISCREG_TPIDRURO_S)
+      .bankedChild()
+      .secure().userSecureWrite(0);
+    InitReg(MISCREG_TPIDRPRW)
+      .banked();
+    InitReg(MISCREG_TPIDRPRW_NS)
+      .bankedChild()
+      .nonSecure().exceptUserMode();
+    InitReg(MISCREG_TPIDRPRW_S)
+      .bankedChild()
+      .secure().exceptUserMode();
+    InitReg(MISCREG_HTPIDR)
+      .hyp().monNonSecure();
+    InitReg(MISCREG_CNTFRQ)
+      .unverifiable()
+      .reads(1).mon();
+    InitReg(MISCREG_CNTKCTL)
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_CNTP_TVAL)
+      .banked();
+    InitReg(MISCREG_CNTP_TVAL_NS)
+      .bankedChild()
+      .allPrivileges().monSecure(0).privSecure(0);
+    InitReg(MISCREG_CNTP_TVAL_S)
+      .unimplemented()
+      .bankedChild()
+      .secure().user(1);
+    InitReg(MISCREG_CNTP_CTL)
+      .banked();
+    InitReg(MISCREG_CNTP_CTL_NS)
+      .bankedChild()
+      .allPrivileges().monSecure(0).privSecure(0);
+    InitReg(MISCREG_CNTP_CTL_S)
+      .unimplemented()
+      .bankedChild()
+      .secure().user(1);
+    InitReg(MISCREG_CNTV_TVAL)
+      .allPrivileges();
+    InitReg(MISCREG_CNTV_CTL)
+      .allPrivileges();
+    InitReg(MISCREG_CNTHCTL)
+      .unimplemented()
+      .hypWrite().monNonSecureRead();
+    InitReg(MISCREG_CNTHP_TVAL)
+      .unimplemented()
+      .hypWrite().monNonSecureRead();
+    InitReg(MISCREG_CNTHP_CTL)
+      .unimplemented()
+      .hypWrite().monNonSecureRead();
+    InitReg(MISCREG_IL1DATA0)
+      .unimplemented()
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_IL1DATA1)
+      .unimplemented()
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_IL1DATA2)
+      .unimplemented()
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_IL1DATA3)
+      .unimplemented()
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_DL1DATA0)
+      .unimplemented()
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_DL1DATA1)
+      .unimplemented()
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_DL1DATA2)
+      .unimplemented()
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_DL1DATA3)
+      .unimplemented()
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_DL1DATA4)
+      .unimplemented()
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_RAMINDEX)
+      .unimplemented()
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_L2ACTLR)
+      .unimplemented()
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_CBAR)
+      .unimplemented()
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_HTTBR)
+      .hyp().monNonSecure();
+    InitReg(MISCREG_VTTBR)
+      .hyp().monNonSecure();
+    InitReg(MISCREG_CNTPCT)
+      .reads(1);
+    InitReg(MISCREG_CNTVCT)
+      .unverifiable()
+      .reads(1);
+    InitReg(MISCREG_CNTP_CVAL)
+      .banked();
+    InitReg(MISCREG_CNTP_CVAL_NS)
+      .bankedChild()
+      .allPrivileges().monSecure(0).privSecure(0);
+    InitReg(MISCREG_CNTP_CVAL_S)
+      .unimplemented()
+      .bankedChild()
+      .secure().user(1);
+    InitReg(MISCREG_CNTV_CVAL)
+      .allPrivileges();
+    InitReg(MISCREG_CNTVOFF)
+      .hyp().monNonSecure();
+    InitReg(MISCREG_CNTHP_CVAL)
+      .unimplemented()
+      .hypWrite().monNonSecureRead();
+    InitReg(MISCREG_CPUMERRSR)
+      .unimplemented()
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_L2MERRSR)
+      .unimplemented()
+      .warnNotFail()
+      .allPrivileges().exceptUserMode();
+
+    // AArch64 registers (Op0=2);
+    InitReg(MISCREG_MDCCINT_EL1)
+      .allPrivileges();
+    InitReg(MISCREG_OSDTRRX_EL1)
+      .allPrivileges()
+      .mapsTo(MISCREG_DBGDTRRXext);
+    InitReg(MISCREG_MDSCR_EL1)
+      .allPrivileges()
+      .mapsTo(MISCREG_DBGDSCRext);
+    InitReg(MISCREG_OSDTRTX_EL1)
+      .allPrivileges()
+      .mapsTo(MISCREG_DBGDTRTXext);
+    InitReg(MISCREG_OSECCR_EL1)
+      .allPrivileges()
+      .mapsTo(MISCREG_DBGOSECCR);
+    InitReg(MISCREG_DBGBVR0_EL1)
+      .allPrivileges()
+      .mapsTo(MISCREG_DBGBVR0 /*, MISCREG_DBGBXVR0 */);
+    InitReg(MISCREG_DBGBVR1_EL1)
+      .allPrivileges()
+      .mapsTo(MISCREG_DBGBVR1 /*, MISCREG_DBGBXVR1 */);
+    InitReg(MISCREG_DBGBVR2_EL1)
+      .allPrivileges()
+      .mapsTo(MISCREG_DBGBVR2 /*, MISCREG_DBGBXVR2 */);
+    InitReg(MISCREG_DBGBVR3_EL1)
+      .allPrivileges()
+      .mapsTo(MISCREG_DBGBVR3 /*, MISCREG_DBGBXVR3 */);
+    InitReg(MISCREG_DBGBVR4_EL1)
+      .allPrivileges()
+      .mapsTo(MISCREG_DBGBVR4 /*, MISCREG_DBGBXVR4 */);
+    InitReg(MISCREG_DBGBVR5_EL1)
+      .allPrivileges()
+      .mapsTo(MISCREG_DBGBVR5 /*, MISCREG_DBGBXVR5 */);
+    InitReg(MISCREG_DBGBCR0_EL1)
+      .allPrivileges()
+      .mapsTo(MISCREG_DBGBCR0);
+    InitReg(MISCREG_DBGBCR1_EL1)
+      .allPrivileges()
+      .mapsTo(MISCREG_DBGBCR1);
+    InitReg(MISCREG_DBGBCR2_EL1)
+      .allPrivileges()
+      .mapsTo(MISCREG_DBGBCR2);
+    InitReg(MISCREG_DBGBCR3_EL1)
+      .allPrivileges()
+      .mapsTo(MISCREG_DBGBCR3);
+    InitReg(MISCREG_DBGBCR4_EL1)
+      .allPrivileges()
+      .mapsTo(MISCREG_DBGBCR4);
+    InitReg(MISCREG_DBGBCR5_EL1)
+      .allPrivileges()
+      .mapsTo(MISCREG_DBGBCR5);
+    InitReg(MISCREG_DBGWVR0_EL1)
+      .allPrivileges()
+      .mapsTo(MISCREG_DBGWVR0);
+    InitReg(MISCREG_DBGWVR1_EL1)
+      .allPrivileges()
+      .mapsTo(MISCREG_DBGWVR1);
+    InitReg(MISCREG_DBGWVR2_EL1)
+      .allPrivileges()
+      .mapsTo(MISCREG_DBGWVR2);
+    InitReg(MISCREG_DBGWVR3_EL1)
+      .allPrivileges()
+      .mapsTo(MISCREG_DBGWVR3);
+    InitReg(MISCREG_DBGWCR0_EL1)
+      .allPrivileges()
+      .mapsTo(MISCREG_DBGWCR0);
+    InitReg(MISCREG_DBGWCR1_EL1)
+      .allPrivileges()
+      .mapsTo(MISCREG_DBGWCR1);
+    InitReg(MISCREG_DBGWCR2_EL1)
+      .allPrivileges()
+      .mapsTo(MISCREG_DBGWCR2);
+    InitReg(MISCREG_DBGWCR3_EL1)
+      .allPrivileges()
+      .mapsTo(MISCREG_DBGWCR3);
+    InitReg(MISCREG_MDCCSR_EL0)
+      .allPrivileges().monSecureWrite(0).monNonSecureWrite(0)
+      .mapsTo(MISCREG_DBGDSCRint);
+    InitReg(MISCREG_MDDTR_EL0)
+      .allPrivileges();
+    InitReg(MISCREG_MDDTRTX_EL0)
+      .allPrivileges();
+    InitReg(MISCREG_MDDTRRX_EL0)
+      .allPrivileges();
+    InitReg(MISCREG_DBGVCR32_EL2)
+      .allPrivileges()
+      .mapsTo(MISCREG_DBGVCR);
+    InitReg(MISCREG_MDRAR_EL1)
+      .allPrivileges().monSecureWrite(0).monNonSecureWrite(0)
+      .mapsTo(MISCREG_DBGDRAR);
+    InitReg(MISCREG_OSLAR_EL1)
+      .allPrivileges().monSecureRead(0).monNonSecureRead(0)
+      .mapsTo(MISCREG_DBGOSLAR);
+    InitReg(MISCREG_OSLSR_EL1)
+      .allPrivileges().monSecureWrite(0).monNonSecureWrite(0)
+      .mapsTo(MISCREG_DBGOSLSR);
+    InitReg(MISCREG_OSDLR_EL1)
+      .allPrivileges()
+      .mapsTo(MISCREG_DBGOSDLR);
+    InitReg(MISCREG_DBGPRCR_EL1)
+      .allPrivileges()
+      .mapsTo(MISCREG_DBGPRCR);
+    InitReg(MISCREG_DBGCLAIMSET_EL1)
+      .allPrivileges()
+      .mapsTo(MISCREG_DBGCLAIMSET);
+    InitReg(MISCREG_DBGCLAIMCLR_EL1)
+      .allPrivileges()
+      .mapsTo(MISCREG_DBGCLAIMCLR);
+    InitReg(MISCREG_DBGAUTHSTATUS_EL1)
+      .allPrivileges().monSecureWrite(0).monNonSecureWrite(0)
+      .mapsTo(MISCREG_DBGAUTHSTATUS);
+    InitReg(MISCREG_TEECR32_EL1);
+    InitReg(MISCREG_TEEHBR32_EL1);
+
+    // AArch64 registers (Op0=1,3);
+    InitReg(MISCREG_MIDR_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_MPIDR_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_REVIDR_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_PFR0_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_PFR1_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_DFR0_EL1)
+      .allPrivileges().exceptUserMode().writes(0)
+      .mapsTo(MISCREG_ID_DFR0);
+    InitReg(MISCREG_ID_AFR0_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_MMFR0_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_MMFR1_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_MMFR2_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_MMFR3_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_ISAR0_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_ISAR1_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_ISAR2_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_ISAR3_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_ISAR4_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_ISAR5_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_MVFR0_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_MVFR1_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_MVFR2_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_AA64PFR0_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_AA64PFR1_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_AA64DFR0_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_AA64DFR1_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_AA64AFR0_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_AA64AFR1_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_AA64ISAR0_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_AA64ISAR1_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_AA64MMFR0_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ID_AA64MMFR1_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_CCSIDR_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_CLIDR_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_AIDR_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_CSSELR_EL1)
+      .allPrivileges().exceptUserMode()
+      .mapsTo(MISCREG_CSSELR_NS);
+    InitReg(MISCREG_CTR_EL0)
+      .reads(1);
+    InitReg(MISCREG_DCZID_EL0)
+      .reads(1);
+    InitReg(MISCREG_VPIDR_EL2)
+      .hyp().mon()
+      .mapsTo(MISCREG_VPIDR);
+    InitReg(MISCREG_VMPIDR_EL2)
+      .hyp().mon()
+      .mapsTo(MISCREG_VMPIDR);
+    InitReg(MISCREG_SCTLR_EL1)
+      .allPrivileges().exceptUserMode()
+      .mapsTo(MISCREG_SCTLR_NS);
+    InitReg(MISCREG_ACTLR_EL1)
+      .allPrivileges().exceptUserMode()
+      .mapsTo(MISCREG_ACTLR_NS);
+    InitReg(MISCREG_CPACR_EL1)
+      .allPrivileges().exceptUserMode()
+      .mapsTo(MISCREG_CPACR);
+    InitReg(MISCREG_SCTLR_EL2)
+      .hyp().mon()
+      .mapsTo(MISCREG_HSCTLR);
+    InitReg(MISCREG_ACTLR_EL2)
+      .hyp().mon()
+      .mapsTo(MISCREG_HACTLR);
+    InitReg(MISCREG_HCR_EL2)
+      .hyp().mon()
+      .mapsTo(MISCREG_HCR /*, MISCREG_HCR2*/);
+    InitReg(MISCREG_MDCR_EL2)
+      .hyp().mon()
+      .mapsTo(MISCREG_HDCR);
+    InitReg(MISCREG_CPTR_EL2)
+      .hyp().mon()
+      .mapsTo(MISCREG_HCPTR);
+    InitReg(MISCREG_HSTR_EL2)
+      .hyp().mon()
+      .mapsTo(MISCREG_HSTR);
+    InitReg(MISCREG_HACR_EL2)
+      .hyp().mon()
+      .mapsTo(MISCREG_HACR);
+    InitReg(MISCREG_SCTLR_EL3)
+      .mon();
+    InitReg(MISCREG_ACTLR_EL3)
+      .mon();
+    InitReg(MISCREG_SCR_EL3)
+      .mon()
+      .mapsTo(MISCREG_SCR); // NAM D7-2005
+    InitReg(MISCREG_SDER32_EL3)
+      .mon()
+      .mapsTo(MISCREG_SDER);
+    InitReg(MISCREG_CPTR_EL3)
+      .mon();
+    InitReg(MISCREG_MDCR_EL3)
+      .mon();
+    InitReg(MISCREG_TTBR0_EL1)
+      .allPrivileges().exceptUserMode()
+      .mapsTo(MISCREG_TTBR0_NS);
+    InitReg(MISCREG_TTBR1_EL1)
+      .allPrivileges().exceptUserMode()
+      .mapsTo(MISCREG_TTBR1_NS);
+    InitReg(MISCREG_TCR_EL1)
+      .allPrivileges().exceptUserMode()
+      .mapsTo(MISCREG_TTBCR_NS);
+    InitReg(MISCREG_TTBR0_EL2)
+      .hyp().mon()
+      .mapsTo(MISCREG_HTTBR);
+    InitReg(MISCREG_TCR_EL2)
+      .hyp().mon()
+      .mapsTo(MISCREG_HTCR);
+    InitReg(MISCREG_VTTBR_EL2)
+      .hyp().mon()
+      .mapsTo(MISCREG_VTTBR);
+    InitReg(MISCREG_VTCR_EL2)
+      .hyp().mon()
+      .mapsTo(MISCREG_VTCR);
+    InitReg(MISCREG_TTBR0_EL3)
+      .mon();
+    InitReg(MISCREG_TCR_EL3)
+      .mon();
+    InitReg(MISCREG_DACR32_EL2)
+      .hyp().mon()
+      .mapsTo(MISCREG_DACR_NS);
+    InitReg(MISCREG_SPSR_EL1)
+      .allPrivileges().exceptUserMode()
+      .mapsTo(MISCREG_SPSR_SVC); // NAM C5.2.17 SPSR_EL1
+    InitReg(MISCREG_ELR_EL1)
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_SP_EL0)
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_SPSEL)
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_CURRENTEL)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_NZCV)
+      .allPrivileges();
+    InitReg(MISCREG_DAIF)
+      .allPrivileges();
+    InitReg(MISCREG_FPCR)
+      .allPrivileges();
+    InitReg(MISCREG_FPSR)
+      .allPrivileges();
+    InitReg(MISCREG_DSPSR_EL0)
+      .allPrivileges();
+    InitReg(MISCREG_DLR_EL0)
+      .allPrivileges();
+    InitReg(MISCREG_SPSR_EL2)
+      .hyp().mon()
+      .mapsTo(MISCREG_SPSR_HYP); // NAM C5.2.18 SPSR_EL2
+    InitReg(MISCREG_ELR_EL2)
+      .hyp().mon();
+    InitReg(MISCREG_SP_EL1)
+      .hyp().mon();
+    InitReg(MISCREG_SPSR_IRQ_AA64)
+      .hyp().mon();
+    InitReg(MISCREG_SPSR_ABT_AA64)
+      .hyp().mon();
+    InitReg(MISCREG_SPSR_UND_AA64)
+      .hyp().mon();
+    InitReg(MISCREG_SPSR_FIQ_AA64)
+      .hyp().mon();
+    InitReg(MISCREG_SPSR_EL3)
+      .mon()
+      .mapsTo(MISCREG_SPSR_MON); // NAM C5.2.19 SPSR_EL3
+    InitReg(MISCREG_ELR_EL3)
+      .mon();
+    InitReg(MISCREG_SP_EL2)
+      .mon();
+    InitReg(MISCREG_AFSR0_EL1)
+      .allPrivileges().exceptUserMode()
+      .mapsTo(MISCREG_ADFSR_NS);
+    InitReg(MISCREG_AFSR1_EL1)
+      .allPrivileges().exceptUserMode()
+      .mapsTo(MISCREG_AIFSR_NS);
+    InitReg(MISCREG_ESR_EL1)
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_IFSR32_EL2)
+      .hyp().mon()
+      .mapsTo(MISCREG_IFSR_NS);
+    InitReg(MISCREG_AFSR0_EL2)
+      .hyp().mon()
+      .mapsTo(MISCREG_HADFSR);
+    InitReg(MISCREG_AFSR1_EL2)
+      .hyp().mon()
+      .mapsTo(MISCREG_HAIFSR);
+    InitReg(MISCREG_ESR_EL2)
+      .hyp().mon()
+      .mapsTo(MISCREG_HSR);
+    InitReg(MISCREG_FPEXC32_EL2)
+      .hyp().mon();
+    InitReg(MISCREG_AFSR0_EL3)
+      .mon();
+    InitReg(MISCREG_AFSR1_EL3)
+      .mon();
+    InitReg(MISCREG_ESR_EL3)
+      .mon();
+    InitReg(MISCREG_FAR_EL1)
+      .allPrivileges().exceptUserMode()
+      .mapsTo(MISCREG_DFAR_NS, MISCREG_IFAR_NS);
+    InitReg(MISCREG_FAR_EL2)
+      .hyp().mon()
+      .mapsTo(MISCREG_HDFAR, MISCREG_HIFAR);
+    InitReg(MISCREG_HPFAR_EL2)
+      .hyp().mon()
+      .mapsTo(MISCREG_HPFAR);
+    InitReg(MISCREG_FAR_EL3)
+      .mon();
+    InitReg(MISCREG_IC_IALLUIS)
+      .warnNotFail()
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_PAR_EL1)
+      .allPrivileges().exceptUserMode()
+      .mapsTo(MISCREG_PAR_NS);
+    InitReg(MISCREG_IC_IALLU)
+      .warnNotFail()
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_DC_IVAC_Xt)
+      .warnNotFail()
+      .writes(1);
+    InitReg(MISCREG_DC_ISW_Xt)
+      .warnNotFail()
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_AT_S1E1R_Xt)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_AT_S1E1W_Xt)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_AT_S1E0R_Xt)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_AT_S1E0W_Xt)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_DC_CSW_Xt)
+      .warnNotFail()
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_DC_CISW_Xt)
+      .warnNotFail()
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_DC_ZVA_Xt)
+      .warnNotFail()
+      .writes(1).userSecureWrite(0);
+    InitReg(MISCREG_IC_IVAU_Xt)
+      .writes(1);
+    InitReg(MISCREG_DC_CVAC_Xt)
+      .warnNotFail()
+      .writes(1);
+    InitReg(MISCREG_DC_CVAU_Xt)
+      .warnNotFail()
+      .writes(1);
+    InitReg(MISCREG_DC_CIVAC_Xt)
+      .warnNotFail()
+      .writes(1);
+    InitReg(MISCREG_AT_S1E2R_Xt)
+      .monNonSecureWrite().hypWrite();
+    InitReg(MISCREG_AT_S1E2W_Xt)
+      .monNonSecureWrite().hypWrite();
+    InitReg(MISCREG_AT_S12E1R_Xt)
+      .hypWrite().monSecureWrite().monNonSecureWrite();
+    InitReg(MISCREG_AT_S12E1W_Xt)
+      .hypWrite().monSecureWrite().monNonSecureWrite();
+    InitReg(MISCREG_AT_S12E0R_Xt)
+      .hypWrite().monSecureWrite().monNonSecureWrite();
+    InitReg(MISCREG_AT_S12E0W_Xt)
+      .hypWrite().monSecureWrite().monNonSecureWrite();
+    InitReg(MISCREG_AT_S1E3R_Xt)
+      .monSecureWrite().monNonSecureWrite();
+    InitReg(MISCREG_AT_S1E3W_Xt)
+      .monSecureWrite().monNonSecureWrite();
+    InitReg(MISCREG_TLBI_VMALLE1IS)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_TLBI_VAE1IS_Xt)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_TLBI_ASIDE1IS_Xt)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_TLBI_VAAE1IS_Xt)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_TLBI_VALE1IS_Xt)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_TLBI_VAALE1IS_Xt)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_TLBI_VMALLE1)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_TLBI_VAE1_Xt)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_TLBI_ASIDE1_Xt)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_TLBI_VAAE1_Xt)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_TLBI_VALE1_Xt)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_TLBI_VAALE1_Xt)
+      .writes(1).exceptUserMode();
+    InitReg(MISCREG_TLBI_IPAS2E1IS_Xt)
+      .hypWrite().monSecureWrite().monNonSecureWrite();
+    InitReg(MISCREG_TLBI_IPAS2LE1IS_Xt)
+      .hypWrite().monSecureWrite().monNonSecureWrite();
+    InitReg(MISCREG_TLBI_ALLE2IS)
+      .monNonSecureWrite().hypWrite();
+    InitReg(MISCREG_TLBI_VAE2IS_Xt)
+      .monNonSecureWrite().hypWrite();
+    InitReg(MISCREG_TLBI_ALLE1IS)
+      .hypWrite().monSecureWrite().monNonSecureWrite();
+    InitReg(MISCREG_TLBI_VALE2IS_Xt)
+      .monNonSecureWrite().hypWrite();
+    InitReg(MISCREG_TLBI_VMALLS12E1IS)
+      .hypWrite().monSecureWrite().monNonSecureWrite();
+    InitReg(MISCREG_TLBI_IPAS2E1_Xt)
+      .hypWrite().monSecureWrite().monNonSecureWrite();
+    InitReg(MISCREG_TLBI_IPAS2LE1_Xt)
+      .hypWrite().monSecureWrite().monNonSecureWrite();
+    InitReg(MISCREG_TLBI_ALLE2)
+      .monNonSecureWrite().hypWrite();
+    InitReg(MISCREG_TLBI_VAE2_Xt)
+      .monNonSecureWrite().hypWrite();
+    InitReg(MISCREG_TLBI_ALLE1)
+      .hypWrite().monSecureWrite().monNonSecureWrite();
+    InitReg(MISCREG_TLBI_VALE2_Xt)
+      .monNonSecureWrite().hypWrite();
+    InitReg(MISCREG_TLBI_VMALLS12E1)
+      .hypWrite().monSecureWrite().monNonSecureWrite();
+    InitReg(MISCREG_TLBI_ALLE3IS)
+      .monSecureWrite().monNonSecureWrite();
+    InitReg(MISCREG_TLBI_VAE3IS_Xt)
+      .monSecureWrite().monNonSecureWrite();
+    InitReg(MISCREG_TLBI_VALE3IS_Xt)
+      .monSecureWrite().monNonSecureWrite();
+    InitReg(MISCREG_TLBI_ALLE3)
+      .monSecureWrite().monNonSecureWrite();
+    InitReg(MISCREG_TLBI_VAE3_Xt)
+      .monSecureWrite().monNonSecureWrite();
+    InitReg(MISCREG_TLBI_VALE3_Xt)
+      .monSecureWrite().monNonSecureWrite();
+    InitReg(MISCREG_PMINTENSET_EL1)
+      .allPrivileges().exceptUserMode()
+      .mapsTo(MISCREG_PMINTENSET);
+    InitReg(MISCREG_PMINTENCLR_EL1)
+      .allPrivileges().exceptUserMode()
+      .mapsTo(MISCREG_PMINTENCLR);
+    InitReg(MISCREG_PMCR_EL0)
+      .allPrivileges()
+      .mapsTo(MISCREG_PMCR);
+    InitReg(MISCREG_PMCNTENSET_EL0)
+      .allPrivileges()
+      .mapsTo(MISCREG_PMCNTENSET);
+    InitReg(MISCREG_PMCNTENCLR_EL0)
+      .allPrivileges()
+      .mapsTo(MISCREG_PMCNTENCLR);
+    InitReg(MISCREG_PMOVSCLR_EL0)
+      .allPrivileges();
+//    .mapsTo(MISCREG_PMOVSCLR);
+    InitReg(MISCREG_PMSWINC_EL0)
+      .writes(1).user()
+      .mapsTo(MISCREG_PMSWINC);
+    InitReg(MISCREG_PMSELR_EL0)
+      .allPrivileges()
+      .mapsTo(MISCREG_PMSELR);
+    InitReg(MISCREG_PMCEID0_EL0)
+      .reads(1).user()
+      .mapsTo(MISCREG_PMCEID0);
+    InitReg(MISCREG_PMCEID1_EL0)
+      .reads(1).user()
+      .mapsTo(MISCREG_PMCEID1);
+    InitReg(MISCREG_PMCCNTR_EL0)
+      .allPrivileges()
+      .mapsTo(MISCREG_PMCCNTR);
+    InitReg(MISCREG_PMXEVTYPER_EL0)
+      .allPrivileges()
+      .mapsTo(MISCREG_PMXEVTYPER);
+    InitReg(MISCREG_PMCCFILTR_EL0)
+      .allPrivileges();
+    InitReg(MISCREG_PMXEVCNTR_EL0)
+      .allPrivileges()
+      .mapsTo(MISCREG_PMXEVCNTR);
+    InitReg(MISCREG_PMUSERENR_EL0)
+      .allPrivileges().userNonSecureWrite(0).userSecureWrite(0)
+      .mapsTo(MISCREG_PMUSERENR);
+    InitReg(MISCREG_PMOVSSET_EL0)
+      .allPrivileges()
+      .mapsTo(MISCREG_PMOVSSET);
+    InitReg(MISCREG_MAIR_EL1)
+      .allPrivileges().exceptUserMode()
+      .mapsTo(MISCREG_PRRR_NS, MISCREG_NMRR_NS);
+    InitReg(MISCREG_AMAIR_EL1)
+      .allPrivileges().exceptUserMode()
+      .mapsTo(MISCREG_AMAIR0_NS, MISCREG_AMAIR1_NS);
+    InitReg(MISCREG_MAIR_EL2)
+      .hyp().mon()
+      .mapsTo(MISCREG_HMAIR0, MISCREG_HMAIR1);
+    InitReg(MISCREG_AMAIR_EL2)
+      .hyp().mon()
+      .mapsTo(MISCREG_HAMAIR0, MISCREG_HAMAIR1);
+    InitReg(MISCREG_MAIR_EL3)
+      .mon();
+    InitReg(MISCREG_AMAIR_EL3)
+      .mon();
+    InitReg(MISCREG_L2CTLR_EL1)
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_L2ECTLR_EL1)
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_VBAR_EL1)
+      .allPrivileges().exceptUserMode()
+      .mapsTo(MISCREG_VBAR_NS);
+    InitReg(MISCREG_RVBAR_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_ISR_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_VBAR_EL2)
+      .hyp().mon()
+      .mapsTo(MISCREG_HVBAR);
+    InitReg(MISCREG_RVBAR_EL2)
+      .mon().hyp().writes(0);
+    InitReg(MISCREG_VBAR_EL3)
+      .mon();
+    InitReg(MISCREG_RVBAR_EL3)
+      .mon().writes(0);
+    InitReg(MISCREG_RMR_EL3)
+      .mon();
+    InitReg(MISCREG_CONTEXTIDR_EL1)
+      .allPrivileges().exceptUserMode()
+      .mapsTo(MISCREG_CONTEXTIDR_NS);
+    InitReg(MISCREG_TPIDR_EL1)
+      .allPrivileges().exceptUserMode()
+      .mapsTo(MISCREG_TPIDRPRW_NS);
+    InitReg(MISCREG_TPIDR_EL0)
+      .allPrivileges()
+      .mapsTo(MISCREG_TPIDRURW_NS);
+    InitReg(MISCREG_TPIDRRO_EL0)
+      .allPrivileges().userNonSecureWrite(0).userSecureWrite(0)
+      .mapsTo(MISCREG_TPIDRURO_NS);
+    InitReg(MISCREG_TPIDR_EL2)
+      .hyp().mon()
+      .mapsTo(MISCREG_HTPIDR);
+    InitReg(MISCREG_TPIDR_EL3)
+      .mon();
+    InitReg(MISCREG_CNTKCTL_EL1)
+      .allPrivileges().exceptUserMode()
+      .mapsTo(MISCREG_CNTKCTL);
+    InitReg(MISCREG_CNTFRQ_EL0)
+      .reads(1).mon()
+      .mapsTo(MISCREG_CNTFRQ);
+    InitReg(MISCREG_CNTPCT_EL0)
+      .reads(1)
+      .mapsTo(MISCREG_CNTPCT); /* 64b */
+    InitReg(MISCREG_CNTVCT_EL0)
+      .unverifiable()
+      .reads(1)
+      .mapsTo(MISCREG_CNTVCT); /* 64b */
+    InitReg(MISCREG_CNTP_TVAL_EL0)
+      .allPrivileges()
+      .mapsTo(MISCREG_CNTP_TVAL_NS);
+    InitReg(MISCREG_CNTP_CTL_EL0)
+      .allPrivileges()
+      .mapsTo(MISCREG_CNTP_CTL_NS);
+    InitReg(MISCREG_CNTP_CVAL_EL0)
+      .allPrivileges()
+      .mapsTo(MISCREG_CNTP_CVAL_NS); /* 64b */
+    InitReg(MISCREG_CNTV_TVAL_EL0)
+      .allPrivileges()
+      .mapsTo(MISCREG_CNTV_TVAL);
+    InitReg(MISCREG_CNTV_CTL_EL0)
+      .allPrivileges()
+      .mapsTo(MISCREG_CNTV_CTL);
+    InitReg(MISCREG_CNTV_CVAL_EL0)
+      .allPrivileges()
+      .mapsTo(MISCREG_CNTV_CVAL); /* 64b */
+    InitReg(MISCREG_PMEVCNTR0_EL0)
+      .allPrivileges();
+//    .mapsTo(MISCREG_PMEVCNTR0);
+    InitReg(MISCREG_PMEVCNTR1_EL0)
+      .allPrivileges();
+//    .mapsTo(MISCREG_PMEVCNTR1);
+    InitReg(MISCREG_PMEVCNTR2_EL0)
+      .allPrivileges();
+//    .mapsTo(MISCREG_PMEVCNTR2);
+    InitReg(MISCREG_PMEVCNTR3_EL0)
+      .allPrivileges();
+//    .mapsTo(MISCREG_PMEVCNTR3);
+    InitReg(MISCREG_PMEVCNTR4_EL0)
+      .allPrivileges();
+//    .mapsTo(MISCREG_PMEVCNTR4);
+    InitReg(MISCREG_PMEVCNTR5_EL0)
+      .allPrivileges();
+//    .mapsTo(MISCREG_PMEVCNTR5);
+    InitReg(MISCREG_PMEVTYPER0_EL0)
+      .allPrivileges();
+//    .mapsTo(MISCREG_PMEVTYPER0);
+    InitReg(MISCREG_PMEVTYPER1_EL0)
+      .allPrivileges();
+//    .mapsTo(MISCREG_PMEVTYPER1);
+    InitReg(MISCREG_PMEVTYPER2_EL0)
+      .allPrivileges();
+//    .mapsTo(MISCREG_PMEVTYPER2);
+    InitReg(MISCREG_PMEVTYPER3_EL0)
+      .allPrivileges();
+//    .mapsTo(MISCREG_PMEVTYPER3);
+    InitReg(MISCREG_PMEVTYPER4_EL0)
+      .allPrivileges();
+//    .mapsTo(MISCREG_PMEVTYPER4);
+    InitReg(MISCREG_PMEVTYPER5_EL0)
+      .allPrivileges();
+//    .mapsTo(MISCREG_PMEVTYPER5);
+    InitReg(MISCREG_CNTVOFF_EL2)
+      .hyp().mon()
+      .mapsTo(MISCREG_CNTVOFF); /* 64b */
+    InitReg(MISCREG_CNTHCTL_EL2)
+      .unimplemented()
+      .warnNotFail()
+      .mon().monNonSecureWrite(0).hypWrite()
+      .mapsTo(MISCREG_CNTHCTL);
+    InitReg(MISCREG_CNTHP_TVAL_EL2)
+      .unimplemented()
+      .mon().monNonSecureWrite(0).hypWrite()
+      .mapsTo(MISCREG_CNTHP_TVAL);
+    InitReg(MISCREG_CNTHP_CTL_EL2)
+      .unimplemented()
+      .mon().monNonSecureWrite(0).hypWrite()
+      .mapsTo(MISCREG_CNTHP_CTL);
+    InitReg(MISCREG_CNTHP_CVAL_EL2)
+      .unimplemented()
+      .mon().monNonSecureWrite(0).hypWrite()
+      .mapsTo(MISCREG_CNTHP_CVAL); /* 64b */
+    InitReg(MISCREG_CNTPS_TVAL_EL1)
+      .unimplemented()
+      .mon().monNonSecureWrite(0).hypWrite();
+    InitReg(MISCREG_CNTPS_CTL_EL1)
+      .unimplemented()
+      .mon().monNonSecureWrite(0).hypWrite();
+    InitReg(MISCREG_CNTPS_CVAL_EL1)
+      .unimplemented()
+      .mon().monNonSecureWrite(0).hypWrite();
+    InitReg(MISCREG_IL1DATA0_EL1)
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_IL1DATA1_EL1)
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_IL1DATA2_EL1)
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_IL1DATA3_EL1)
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_DL1DATA0_EL1)
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_DL1DATA1_EL1)
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_DL1DATA2_EL1)
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_DL1DATA3_EL1)
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_DL1DATA4_EL1)
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_L2ACTLR_EL1)
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_CPUACTLR_EL1)
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_CPUECTLR_EL1)
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_CPUMERRSR_EL1)
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_L2MERRSR_EL1)
+      .unimplemented()
+      .warnNotFail()
+      .allPrivileges().exceptUserMode();
+    InitReg(MISCREG_CBAR_EL1)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_CONTEXTIDR_EL2)
+      .mon().hyp();
+
+    // Dummy registers
+    InitReg(MISCREG_NOP)
+      .allPrivileges();
+    InitReg(MISCREG_RAZ)
+      .allPrivileges().exceptUserMode().writes(0);
+    InitReg(MISCREG_CP14_UNIMPL)
+      .unimplemented()
+      .warnNotFail();
+    InitReg(MISCREG_CP15_UNIMPL)
+      .unimplemented()
+      .warnNotFail();
+    InitReg(MISCREG_A64_UNIMPL)
+      .unimplemented()
+      .warnNotFail();
+    InitReg(MISCREG_UNKNOWN);
+
+    // Register mappings for some unimplemented registers:
+    // ESR_EL1 -> DFSR
+    // RMR_EL1 -> RMR
+    // RMR_EL2 -> HRMR
+    // DBGDTR_EL0 -> DBGDTR{R or T}Xint
+    // DBGDTRRX_EL0 -> DBGDTRRXint
+    // DBGDTRTX_EL0 -> DBGDTRRXint
+    // MDCR_EL3 -> SDCR, NAM D7-2108 (the latter is unimpl. in gem5)
+
+    completed = true;
+}
+
 } // namespace ArmISA