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| author | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2017-12-22 12:30:05 +0000 |
|---|---|---|
| committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2018-02-07 15:06:50 +0000 |
| commit | d7062b1273dfcfac0690dff88470c4ebf28f09c1 (patch) | |
| tree | fc6bd9d0a1a72176caa9482b957f06b60f994f29 | |
| parent | 234fba56bc6dde84c9a6a57e539676fa55b0ff76 (diff) | |
| download | gem5-d7062b1273dfcfac0690dff88470c4ebf28f09c1.tar.xz | |
arch-arm: isSecureBelow from armarm pseudocode
This patch introduces the inSecureBelow pseudocode function
defined in the armarm documentation. It also replaces the
inSecureState function call which was improperly used in
ELIs32: we might be in secure state (EL3), but with non-secure
lower ELs (SCR.NS = 1).
Change-Id: I01febcb54392ad4e51e785b4d5153aeb3437c778
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Chuan Zhu <chuan.zhu@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/7221
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
| -rw-r--r-- | src/arch/arm/utility.cc | 13 | ||||
| -rw-r--r-- | src/arch/arm/utility.hh | 13 |
2 files changed, 20 insertions, 6 deletions
diff --git a/src/arch/arm/utility.cc b/src/arch/arm/utility.cc index 56503ac62..a49f82971 100644 --- a/src/arch/arm/utility.cc +++ b/src/arch/arm/utility.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2009-2014, 2016-2017 ARM Limited + * Copyright (c) 2009-2014, 2016-2018 ARM Limited * All rights reserved. * * The license below extends only to copyright in the software and shall @@ -184,6 +184,13 @@ inSecureState(ThreadContext *tc) scr, tc->readMiscReg(MISCREG_CPSR)); } +inline bool +isSecureBelowEL3(ThreadContext *tc) +{ + SCR scr = tc->readMiscReg(MISCREG_SCR_EL3); + return ArmSystem::haveEL(tc, EL3) && scr.ns == 0; +} + bool inAArch64(ThreadContext *tc) { @@ -256,8 +263,8 @@ ELIs32(ThreadContext *tc, ExceptionLevel el) HCR hcr = tc->readMiscReg(MISCREG_HCR_EL2); bool aarch32_at_el1 = (aarch32_below_el3 - || (have_el2 - && !inSecureState(tc) && hcr.rw == 0)); + || (have_el2 + && !isSecureBelowEL3(tc) && hcr.rw == 0)); // Only know if EL0 using AArch32 from PSTATE if (el == EL0 && !aarch32_at_el1) { diff --git a/src/arch/arm/utility.hh b/src/arch/arm/utility.hh index 622fd1282..6e4e76b75 100644 --- a/src/arch/arm/utility.hh +++ b/src/arch/arm/utility.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010, 2012-2013, 2016-2017 ARM Limited + * Copyright (c) 2010, 2012-2013, 2016-2018 ARM Limited * All rights reserved * * The license below extends only to copyright in the software and shall @@ -201,10 +201,17 @@ inSecureState(SCR scr, CPSR cpsr) } } -bool longDescFormatInUse(ThreadContext *tc); - bool inSecureState(ThreadContext *tc); +/** + * Return TRUE if an Exception level below EL3 is in Secure state. + * Differs from inSecureState in that it ignores the current EL + * or Mode in considering security state. + */ +inline bool isSecureBelowEL3(ThreadContext *tc); + +bool longDescFormatInUse(ThreadContext *tc); + uint32_t getMPIDR(ArmSystem *arm_sys, ThreadContext *tc); static inline uint32_t |