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authorWendy Elsasser <wendy.elsasser@arm.com>2018-02-09 12:34:40 -0600
committerCurtis Dunham <curtis.dunham@arm.com>2018-02-09 21:17:31 +0000
commite9f736738d61775cd3b739dbc9f85cbf4f4c135f (patch)
treeb30ab13dcc55d931ced19732e6ff9780bb1d42de
parent6af3a7df1f42fe2ff1cb32ed5d373ce39691281f (diff)
downloadgem5-e9f736738d61775cd3b739dbc9f85cbf4f4c135f.tar.xz
Fix DDR4_2400_8x8 DRAMCTRL configuration
Change-Id: I7af361e146909acc158590354ab22732d4b2f3d5 Signed-off-by: Wendy Elsasser <wendy.elsasser@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/8101 Maintainer: Jason Lowe-Power <jason@lowepower.com>
-rw-r--r--src/mem/DRAMCtrl.py3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mem/DRAMCtrl.py b/src/mem/DRAMCtrl.py
index d1c5daf62..3145751cc 100644
--- a/src/mem/DRAMCtrl.py
+++ b/src/mem/DRAMCtrl.py
@@ -642,6 +642,9 @@ class DDR4_2400_8x8(DDR4_2400_16x4):
# Each device has a page (row buffer) size of 1 Kbyte (1K columns x8)
device_rowbuffer_size = '1kB'
+ # 8x8 configuration, so 8 devices
+ devices_per_rank = 8
+
# RRD_L (same bank group) for 1K page is MAX(4 CK, 4.9ns)
tRRD_L = '4.9ns';