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author | Gabe Black <gblack@eecs.umich.edu> | 2007-04-18 21:27:37 -0400 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-04-18 21:27:37 -0400 |
commit | f3a0abbecc3456147f1ca3e297a50ae4353316fd (patch) | |
tree | 1b91f8e7af23bc2f57cc899f90050e3d86c6a722 | |
parent | dde2b11ae6a003182037c0970693ff8a98e0aab6 (diff) | |
parent | 5825104982d75daee20cd82da3ea2581c31d5292 (diff) | |
download | gem5-f3a0abbecc3456147f1ca3e297a50ae4353316fd.tar.xz |
Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
into zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem-o3-spec
--HG--
extra : convert_revision : 26118d0dce464405148d2693fee4561fa0ce10ff
-rw-r--r-- | src/python/SConscript | 5 | ||||
-rw-r--r-- | src/sim/simulate.cc | 3 | ||||
-rwxr-xr-x | util/make_release.py | 37 |
3 files changed, 16 insertions, 29 deletions
diff --git a/src/python/SConscript b/src/python/SConscript index e1095eabe..3c5ab4da1 100644 --- a/src/python/SConscript +++ b/src/python/SConscript @@ -103,7 +103,6 @@ SimObject('m5/objects/Process.py') SimObject('m5/objects/Repl.py') SimObject('m5/objects/Root.py') SimObject('m5/objects/Sampler.py') -SimObject('m5/objects/Scsi.py') SimObject('m5/objects/SimConsole.py') SimObject('m5/objects/SimpleCPU.py') SimObject('m5/objects/SimpleDisk.py') @@ -114,7 +113,3 @@ SimObject('m5/objects/T1000.py') #SimObject('m5/objects/Tru64System.py') SimObject('m5/objects/Tsunami.py') SimObject('m5/objects/Uart.py') - -if env['ALPHA_TLASER']: - SimObject('m5/objects/DmaEngine.py') - SimObject('m5/objects/Turbolaser.py') diff --git a/src/sim/simulate.cc b/src/sim/simulate.cc index 55cbb50a9..36bdff45e 100644 --- a/src/sim/simulate.cc +++ b/src/sim/simulate.cc @@ -92,10 +92,9 @@ simulate(Tick num_cycles) if (async_event) { async_event = false; if (async_statdump || async_statreset) { + Stats::StatEvent(async_statdump, async_statreset); async_statdump = false; async_statreset = false; - - Stats::StatEvent(async_statdump, async_statreset); } if (async_exit) { diff --git a/util/make_release.py b/util/make_release.py index 8d69614dc..7362bd77c 100755 --- a/util/make_release.py +++ b/util/make_release.py @@ -133,30 +133,23 @@ rmtree(release_dir, 'src/dev/i8*') remove(release_dir, 'util/chgcopyright') remove(release_dir, 'util/make_release.py') -# fix up the SConscript to deal with files we've removed -mem_expr = re.compile('.*mem/cache/(tags/split|prefetch/(ghb|stride)).*') -inscript = file(joinpath(release_dir, 'src', 'SConscript'), 'r').readlines() -outscript = file(joinpath(release_dir, 'src', 'SConscript'), 'w') -for line in inscript: - if mem_expr.match(line): - continue - - outscript.write(line) -outscript.close() +def remove_sources(regex, subdir): + script = joinpath(release_dir, subdir, 'SConscript') + if isinstance(regex, str): + regex = re.compile(regex) + inscript = file(script, 'r').readlines() + outscript = file(script, 'w') + for line in inscript: + if regex.match(line): + continue + + outscript.write(line) + outscript.close() # fix up the SConscript to deal with files we've removed -mem_expr = re.compile('.*i8254xGBe.*') -inscript = file(joinpath(release_dir, 'src', 'dev', 'SConscript'), 'r').readlines() -outscript = file(joinpath(release_dir, 'src', 'dev', 'SConscript'), 'w') -for line in inscript: - if mem_expr.match(line): - continue - - outscript.write(line) -outscript.close() - - - +remove_sources(r'.*split.*\.cc', 'src/mem/cache/tags') +remove_sources(r'.*(ghb|stride)_prefetcher\.cc', 'src/mem/cache/prefetch') +remove_sources(r'.*i8254xGBe.*', 'src/dev') benches = [ 'bzip2', 'eon', 'gzip', 'mcf', 'parser', 'perlbmk', 'twolf', 'vortex' ] |