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author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:10 -0500 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:10 -0500 |
commit | fb2329791464a3ea9d8c13a6aa17bf9e379dbdb9 (patch) | |
tree | b56d402a901c20554f545d4a4a6186390dd77c28 | |
parent | 247acd93c49be2d9a677775e8684f6971b6c5364 (diff) | |
download | gem5-fb2329791464a3ea9d8c13a6aa17bf9e379dbdb9.tar.xz |
ARM: Make a base class for instructions that use only an immediate.
-rw-r--r-- | src/arch/arm/insts/misc.cc | 9 | ||||
-rw-r--r-- | src/arch/arm/insts/misc.hh | 13 | ||||
-rw-r--r-- | src/arch/arm/isa/templates/misc.isa | 19 |
3 files changed, 41 insertions, 0 deletions
diff --git a/src/arch/arm/insts/misc.cc b/src/arch/arm/insts/misc.cc index a63bad690..87d3d1796 100644 --- a/src/arch/arm/insts/misc.cc +++ b/src/arch/arm/insts/misc.cc @@ -144,6 +144,15 @@ MsrRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const } std::string +ImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const +{ + std::stringstream ss; + printMnemonic(ss); + ccprintf(ss, "#%d", imm); + return ss.str(); +} + +std::string RegRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const { std::stringstream ss; diff --git a/src/arch/arm/insts/misc.hh b/src/arch/arm/insts/misc.hh index 23f777c2d..8080c4e1f 100644 --- a/src/arch/arm/insts/misc.hh +++ b/src/arch/arm/insts/misc.hh @@ -94,6 +94,19 @@ class MsrRegOp : public MsrBase std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; }; +class ImmOp : public PredOp +{ + protected: + uint32_t imm; + + ImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, + uint32_t _imm) : + PredOp(mnem, _machInst, __opClass), imm(_imm) + {} + + std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; +}; + class RegRegOp : public PredOp { protected: diff --git a/src/arch/arm/isa/templates/misc.isa b/src/arch/arm/isa/templates/misc.isa index 2a6a4f510..771b6d784 100644 --- a/src/arch/arm/isa/templates/misc.isa +++ b/src/arch/arm/isa/templates/misc.isa @@ -99,6 +99,25 @@ def template MsrImmConstructor {{ } }}; +def template ImmOpDeclare {{ +class %(class_name)s : public %(base_class)s +{ + protected: + public: + // Constructor + %(class_name)s(ExtMachInst machInst, uint32_t _imm); + %(BasicExecDeclare)s +}; +}}; + +def template ImmOpConstructor {{ + inline %(class_name)s::%(class_name)s(ExtMachInst machInst, uint32_t _imm) + : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _imm) + { + %(constructor)s; + } +}}; + def template RegRegOpDeclare {{ class %(class_name)s : public %(base_class)s { |