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authorChuan Zhu <chuan.zhu@arm.com>2017-08-02 09:52:28 +0100
committerAndreas Sandberg <andreas.sandberg@arm.com>2018-02-16 09:28:24 +0000
commitfcc98a50e3af273921914f9adf61db7b1944bb05 (patch)
treeabff11863d45408c0a270c695a038e9f67463f01
parentdec0025dea92f78309d17b1840ed8449ac397d8f (diff)
downloadgem5-fcc98a50e3af273921914f9adf61db7b1944bb05.tar.xz
arch-arm: Fix big endian support in do{Long,L1,L2}Descriptor
do{Long,L1,L2}Descriptor was not able to load descriptors correctly for big-endian situations, causing recognised Descriptors. Added big-endian related data conversions to correct them. Change-Id: I0fdfbbdf56f94bbed19172acae1b6e4a0382b5a0 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/8144 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
-rw-r--r--src/arch/arm/table_walker.cc9
-rw-r--r--src/arch/arm/utility.hh5
2 files changed, 14 insertions, 0 deletions
diff --git a/src/arch/arm/table_walker.cc b/src/arch/arm/table_walker.cc
index 428556b1a..3c79e43ac 100644
--- a/src/arch/arm/table_walker.cc
+++ b/src/arch/arm/table_walker.cc
@@ -1423,6 +1423,9 @@ TableWalker::doL1Descriptor()
return;
}
+ currState->l1Desc.data = htog(currState->l1Desc.data,
+ byteOrder(currState->tc));
+
DPRINTF(TLB, "L1 descriptor for %#x is %#x\n",
currState->vaddr_tainted, currState->l1Desc.data);
TlbEntry te;
@@ -1518,6 +1521,9 @@ TableWalker::doLongDescriptor()
return;
}
+ currState->longDesc.data = htog(currState->longDesc.data,
+ byteOrder(currState->tc));
+
DPRINTF(TLB, "L%d descriptor for %#llx is %#llx (%s)\n",
currState->longDesc.lookupLevel, currState->vaddr_tainted,
currState->longDesc.data,
@@ -1709,6 +1715,9 @@ TableWalker::doL2Descriptor()
return;
}
+ currState->l2Desc.data = htog(currState->l2Desc.data,
+ byteOrder(currState->tc));
+
DPRINTF(TLB, "L2 descriptor for %#x is %#x\n",
currState->vaddr_tainted, currState->l2Desc.data);
TlbEntry te;
diff --git a/src/arch/arm/utility.hh b/src/arch/arm/utility.hh
index 8efe4ad10..796ded771 100644
--- a/src/arch/arm/utility.hh
+++ b/src/arch/arm/utility.hh
@@ -348,6 +348,11 @@ int decodePhysAddrRange64(uint8_t pa_enc);
*/
uint8_t encodePhysAddrRange64(int pa_size);
+inline ByteOrder byteOrder(ThreadContext *tc)
+{
+ return isBigEndian64(tc) ? BigEndianByteOrder : LittleEndianByteOrder;
+};
+
}
#endif