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| author | David Hashe <david.hashe@amd.com> | 2015-07-20 09:15:18 -0500 |
|---|---|---|
| committer | David Hashe <david.hashe@amd.com> | 2015-07-20 09:15:18 -0500 |
| commit | 8f71e667b3d1e9e9eea49ea7e6420a36017f4441 (patch) | |
| tree | ab6e08480684d5a38ea5d9c20937ad968b17b530 | |
| parent | a2d9aae3c3dae1ffdd62eb91d2318758772684dc (diff) | |
| download | gem5-8f71e667b3d1e9e9eea49ea7e6420a36017f4441.tar.xz | |
cpu: Fixed a bug on where to fetch the next instruction from
Figure out if the next instruction to fetch comes from the micro-op ROM
or not. Otherwise, wrong instructions may be fetched.
| -rw-r--r-- | src/cpu/o3/fetch_impl.hh | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh index a462d9251..1d0cfd137 100644 --- a/src/cpu/o3/fetch_impl.hh +++ b/src/cpu/o3/fetch_impl.hh @@ -1,5 +1,6 @@ /* * Copyright (c) 2010-2014 ARM Limited + * Copyright (c) 2012-2013 AMD * All rights reserved. * * The license below extends only to copyright in the software and shall @@ -1371,6 +1372,10 @@ DefaultFetch<Impl>::fetch(bool &status_change) } while ((curMacroop || decoder[tid]->instReady()) && numInst < fetchWidth && fetchQueue[tid].size() < fetchQueueSize); + + // Re-evaluate whether the next instruction to fetch is in micro-op ROM + // or not. + inRom = isRomMicroPC(thisPC.microPC()); } if (predictedBranch) { |