summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorJiuyue Ma <majiuyue@ncic.ac.cn>2014-06-13 16:48:47 +0800
committerJiuyue Ma <majiuyue@ncic.ac.cn>2014-06-13 16:48:47 +0800
commit9fb8b8515b2f139a17802dd9b1ecc94334700ce4 (patch)
treeada92ae437492abacd75c63f297396a0a3bad5c8
parente1a5522a8927af9e39ebd8961673a1e8a5e18364 (diff)
downloadgem5-9fb8b8515b2f139a17802dd9b1ecc94334700ce4.tar.xz
x86: add LongModeAddressSize function to cpuid
LongModeAddressSize was used by kernel 2.6.28.4 for physical address validation, if not properly implemented, PCI resource allocation may failed because of ioremap failed: - linux-2.6.28.4/arch/x86/mm/ioremap.c:27-30 27 static inline int phys_addr_valid(unsigned long addr) 28 { 29 return addr < (1UL << boot_cpu_data.x86_phys_bits); 30 } - linux-2.6.28.4/arch/x86/kernel/cpu/common.c:475-482 475 #ifdef CONFIG_X86_64 476 if (c->extended_cpuid_level >= 0x80000008) { 477 u32 eax = cpuid_eax(0x80000008); 478 479 c->x86_virt_bits = (eax >> 8) & 0xff; 480 c->x86_phys_bits = eax & 0xff; 481 } 482 #endif - linux-2.6.28.4/arch/x86/mm/ioremap.c:209-214 209 if (!phys_addr_valid(phys_addr)) { 210 printk(KERN_WARNING "ioremap: invalid physical address %llx\n", 211 (unsigned long long)phys_addr); 212 WARN_ON_ONCE(1); 213 return NULL; 214 } This patch return 0x0000ffff for LongModeAddressSize, which guarantee phys_addr_valid never failed. Committed by: Nilay Vaish <nilay@cs.wisc.edu>
-rw-r--r--src/arch/x86/cpuid.cc11
1 files changed, 7 insertions, 4 deletions
diff --git a/src/arch/x86/cpuid.cc b/src/arch/x86/cpuid.cc
index 864cdd7f4..2656cd94e 100644
--- a/src/arch/x86/cpuid.cc
+++ b/src/arch/x86/cpuid.cc
@@ -48,12 +48,12 @@ namespace X86ISA {
L1CacheAndTLB,
L2L3CacheAndL2TLB,
APMInfo,
+ LongModeAddressSize,
/*
* The following are defined by the spec but not yet implemented
*/
-/* LongModeAddressSize,
- // Function 9 is reserved
+/* // Function 9 is reserved
SVMInfo = 10,
// Functions 11-24 are reserved
TLB1GBPageInfo = 25,
@@ -130,8 +130,11 @@ namespace X86ISA {
result = CpuidResult(0x80000018, 0x68747541,
0x69746e65, 0x444d4163);
break;
-/* case LongModeAddressSize:
- case SVMInfo:
+ case LongModeAddressSize:
+ result = CpuidResult(0x0000ffff, 0x00000000,
+ 0x00000000, 0x00000000);
+ break;
+/* case SVMInfo:
case TLB1GBPageInfo:
case PerformanceInfo:*/
default: