diff options
author | Gabe Black <gblack@eecs.umich.edu> | 2009-02-23 00:20:34 -0800 |
---|---|---|
committer | Gabe Black <gblack@eecs.umich.edu> | 2009-02-23 00:20:34 -0800 |
commit | e8c1c3e72eb01409f7ec110eee3b32c07347bf6f (patch) | |
tree | 26f23b24fdfdfff630cda342e94d055437f9d5f8 | |
parent | 6c5afe6346b31edf6af245002c270a3c26618833 (diff) | |
download | gem5-e8c1c3e72eb01409f7ec110eee3b32c07347bf6f.tar.xz |
X86: Pass whether an access was a read/write/fetch so faults can behave accordingly.
-rw-r--r-- | src/arch/x86/faults.cc | 4 | ||||
-rw-r--r-- | src/arch/x86/faults.hh | 12 | ||||
-rw-r--r-- | src/arch/x86/pagetable_walker.cc | 4 | ||||
-rw-r--r-- | src/arch/x86/pagetable_walker.hh | 5 | ||||
-rw-r--r-- | src/arch/x86/tlb.cc | 6 | ||||
-rw-r--r-- | src/arch/x86/tlb.hh | 2 |
6 files changed, 21 insertions, 12 deletions
diff --git a/src/arch/x86/faults.cc b/src/arch/x86/faults.cc index 1234e68e5..f01197f36 100644 --- a/src/arch/x86/faults.cc +++ b/src/arch/x86/faults.cc @@ -166,13 +166,13 @@ namespace X86ISA void FakeITLBFault::invoke(ThreadContext * tc) { // Start the page table walker. - tc->getITBPtr()->walk(tc, vaddr); + tc->getITBPtr()->walk(tc, vaddr, write, execute); } void FakeDTLBFault::invoke(ThreadContext * tc) { // Start the page table walker. - tc->getDTBPtr()->walk(tc, vaddr); + tc->getDTBPtr()->walk(tc, vaddr, write, execute); } #else // !FULL_SYSTEM diff --git a/src/arch/x86/faults.hh b/src/arch/x86/faults.hh index 6a6dfc80a..ae4314434 100644 --- a/src/arch/x86/faults.hh +++ b/src/arch/x86/faults.hh @@ -429,10 +429,12 @@ namespace X86ISA { protected: Addr vaddr; + bool write; + bool execute; public: - FakeITLBFault(Addr _vaddr) : + FakeITLBFault(Addr _vaddr, bool _write, bool _execute) : X86Fault("fake instruction tlb fault", "itlb", 0), - vaddr(_vaddr) + vaddr(_vaddr), write(_write), execute(_execute) {} void invoke(ThreadContext * tc); @@ -442,10 +444,12 @@ namespace X86ISA { protected: Addr vaddr; + bool write; + bool execute; public: - FakeDTLBFault(Addr _vaddr) : + FakeDTLBFault(Addr _vaddr, bool _write, bool _execute) : X86Fault("fake data tlb fault", "dtlb", 0), - vaddr(_vaddr) + vaddr(_vaddr), write(_write), execute(_execute) {} void invoke(ThreadContext * tc); diff --git a/src/arch/x86/pagetable_walker.cc b/src/arch/x86/pagetable_walker.cc index 564a04b38..b0b9209b5 100644 --- a/src/arch/x86/pagetable_walker.cc +++ b/src/arch/x86/pagetable_walker.cc @@ -319,11 +319,13 @@ Walker::doNext(PacketPtr &read, PacketPtr &write) } void -Walker::start(ThreadContext * _tc, Addr vaddr) +Walker::start(ThreadContext * _tc, Addr vaddr, bool _write, bool _execute) { assert(state == Ready); assert(!tc); tc = _tc; + execute = _execute; + write = _write; VAddr addr = vaddr; diff --git a/src/arch/x86/pagetable_walker.hh b/src/arch/x86/pagetable_walker.hh index 324f16f3c..de3f21195 100644 --- a/src/arch/x86/pagetable_walker.hh +++ b/src/arch/x86/pagetable_walker.hh @@ -95,7 +95,7 @@ namespace X86ISA void doNext(PacketPtr &read, PacketPtr &write); // Kick off the state machine. - void start(ThreadContext * _tc, Addr vaddr); + void start(ThreadContext * _tc, Addr vaddr, bool write, bool execute); protected: @@ -165,7 +165,10 @@ namespace X86ISA State nextState; int size; bool enableNX; + bool write, execute; TlbEntry entry; + + Fault pageFault(bool present); public: diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc index 1009386d7..34829848c 100644 --- a/src/arch/x86/tlb.cc +++ b/src/arch/x86/tlb.cc @@ -140,9 +140,9 @@ TLB::lookup(Addr va, bool update_lru) #if FULL_SYSTEM void -TLB::walk(ThreadContext * _tc, Addr vaddr) +TLB::walk(ThreadContext * _tc, Addr vaddr, bool write, bool execute) { - walker->start(_tc, vaddr); + walker->start(_tc, vaddr, write, execute); } #endif @@ -616,7 +616,7 @@ TLB::translate(RequestPtr &req, ThreadContext *tc, bool write, bool execute) // The vaddr already has the segment base applied. TlbEntry *entry = lookup(vaddr); if (!entry) { - return new TlbFault(vaddr); + return new TlbFault(vaddr, write, execute); } else { // Do paging protection checks. DPRINTF(TLB, "Entry found with paddr %#x, doing protection checks.\n", entry->paddr); diff --git a/src/arch/x86/tlb.hh b/src/arch/x86/tlb.hh index 89b965e97..56d635a90 100644 --- a/src/arch/x86/tlb.hh +++ b/src/arch/x86/tlb.hh @@ -119,7 +119,7 @@ namespace X86ISA Walker * walker; - void walk(ThreadContext * _tc, Addr vaddr); + void walk(ThreadContext * _tc, Addr vaddr, bool write, bool execute); #endif public: |