ruby: Reduced ruby latencies

The previous slower ruby latencies created a mismatch between the faster M5
cpu models and the much slower ruby memory system.  Specifically smp
interrupts were much slower and infrequent, as well as cpus moving in and out
of spin locks.  The result was many cpus were idle for large periods of time.

These changes fix the latency mismatch.

9 files changed, 13 insertions, 13 deletions

diff --git a/configs/common/Options.py b/configs/common/Options.py
index 4efbc541e..42e1585d7 100644
--- a/configs/common/Options.py
+++ b/configs/common/Options.py
@@ -34,7 +34,7 @@ parser.add_option("-n", "--num-cpus", type="int", default=1)
 parser.add_option("--caches", action="store_true")
 parser.add_option("--l2cache", action="store_true")
 parser.add_option("--fastmem", action="store_true")
-parser.add_option("--clock", action="store", type="string", default='1GHz')
+parser.add_option("--clock", action="store", type="string", default='2GHz')
 parser.add_option("--num-dirs", type="int", default=1)
 parser.add_option("--num-l2caches", type="int", default=1)
 parser.add_option("--num-l3caches", type="int", default=1)
diff --git a/configs/example/ruby_se.py b/configs/example/ruby_se.py
index a0e839bae..d51f92f19 100644
--- a/configs/example/ruby_se.py
+++ b/configs/example/ruby_se.py
@@ -143,7 +143,7 @@ assert(options.timing)
 assert(test_mem_mode == 'timing')
 assert(FutureClass == None)
 
-CPUClass.clock = '1GHz'
+CPUClass.clock = options.clock
 
 np = options.num_cpus
 
diff --git a/configs/ruby/MOESI_CMP_token.py b/configs/ruby/MOESI_CMP_token.py
index f2669ef78..3853ebbb4 100644
--- a/configs/ruby/MOESI_CMP_token.py
+++ b/configs/ruby/MOESI_CMP_token.py
@@ -36,13 +36,13 @@ from m5.defines import buildEnv
 # Note: the L1 Cache latency is only used by the sequencer on fast path hits
 #
 class L1Cache(RubyCache):
-    latency = 3
+    latency = 2
 
 #
 # Note: the L2 Cache latency is not currently used
 #
 class L2Cache(RubyCache):
-    latency = 15
+    latency = 10
 
 def define_options(parser):
     parser.add_option("--l1-retries", type="int", default=1,
diff --git a/configs/ruby/MOESI_hammer.py b/configs/ruby/MOESI_hammer.py
index 5cf27206b..818600a5a 100644
--- a/configs/ruby/MOESI_hammer.py
+++ b/configs/ruby/MOESI_hammer.py
@@ -35,13 +35,13 @@ from m5.defines import buildEnv
 # Note: the L1 Cache latency is only used by the sequencer on fast path hits
 #
 class L1Cache(RubyCache):
-    latency = 3
+    latency = 2
 
 #
 # Note: the L2 Cache latency is not currently used
 #
 class L2Cache(RubyCache):
-    latency = 15
+    latency = 10
 
 def define_options(parser):
     return
diff --git a/src/mem/protocol/MOESI_CMP_token-L1cache.sm b/src/mem/protocol/MOESI_CMP_token-L1cache.sm
index 4af3338d8..8424479bd 100644
--- a/src/mem/protocol/MOESI_CMP_token-L1cache.sm
+++ b/src/mem/protocol/MOESI_CMP_token-L1cache.sm
@@ -41,7 +41,7 @@ machine(L1Cache, "Token protocol")
    int l1_request_latency = 2,
    int l1_response_latency = 2,
    int retry_threshold = 1,
-   int fixed_timeout_latency = 300,
+   int fixed_timeout_latency = 100,
    bool dynamic_timeout_enabled = true
 {
 
diff --git a/src/mem/protocol/MOESI_CMP_token-L2cache.sm b/src/mem/protocol/MOESI_CMP_token-L2cache.sm
index fcc91f223..a90b24800 100644
--- a/src/mem/protocol/MOESI_CMP_token-L2cache.sm
+++ b/src/mem/protocol/MOESI_CMP_token-L2cache.sm
@@ -35,8 +35,8 @@
 machine(L2Cache, "Token protocol") 
  : CacheMemory * L2cacheMemory,
    int N_tokens,
-   int l2_request_latency = 10,
-   int l2_response_latency = 10,
+   int l2_request_latency = 5,
+   int l2_response_latency = 5,
    bool filtering_enabled = true
 {
 
diff --git a/src/mem/protocol/MOESI_CMP_token-dir.sm b/src/mem/protocol/MOESI_CMP_token-dir.sm
index 5122e30d3..261fbba07 100644
--- a/src/mem/protocol/MOESI_CMP_token-dir.sm
+++ b/src/mem/protocol/MOESI_CMP_token-dir.sm
@@ -36,9 +36,9 @@ machine(Directory, "Token protocol")
  : DirectoryMemory * directory,
    MemoryControl * memBuffer,
    int l2_select_num_bits,
-   int directory_latency = 6,
+   int directory_latency = 5,
    bool distributed_persistent = true,
-   int fixed_timeout_latency = 300
+   int fixed_timeout_latency = 100
 {
 
   MessageBuffer dmaResponseFromDir, network="To", virtual_network="5", ordered="true";
diff --git a/src/mem/protocol/MOESI_hammer-cache.sm b/src/mem/protocol/MOESI_hammer-cache.sm
index 3de72199b..bb9b8b772 100644
--- a/src/mem/protocol/MOESI_hammer-cache.sm
+++ b/src/mem/protocol/MOESI_hammer-cache.sm
@@ -38,7 +38,7 @@ machine(L1Cache, "AMD Hammer-like protocol")
   CacheMemory * L1IcacheMemory,
   CacheMemory * L1DcacheMemory,
   CacheMemory * L2cacheMemory,
-  int cache_response_latency = 12,
+  int cache_response_latency = 10,
   int issue_latency = 2
 {
 
diff --git a/src/mem/protocol/MOESI_hammer-dir.sm b/src/mem/protocol/MOESI_hammer-dir.sm
index b2fec17f5..d967c813c 100644
--- a/src/mem/protocol/MOESI_hammer-dir.sm
+++ b/src/mem/protocol/MOESI_hammer-dir.sm
@@ -36,7 +36,7 @@
 machine(Directory, "AMD Hammer-like protocol") 
 : DirectoryMemory * directory,
   MemoryControl * memBuffer,
-  int memory_controller_latency = 12
+  int memory_controller_latency = 2
 {
 
   MessageBuffer forwardFromDir, network="To", virtual_network="3", ordered="false";