summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2009-07-08 23:02:19 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-07-08 23:02:19 -0700
commit2fb8d481ab37db60a27126d151be23fad10adc50 (patch)
treedbe8bc41f7d296455588565c07fb0ca1829c3fe8
parentddcf084f162374bab8f42ed5ab17c7cd4b67a559 (diff)
downloadgem5-2fb8d481ab37db60a27126d151be23fad10adc50.tar.xz
ARM: Tune up predicated instruction decoding.
-rw-r--r--src/arch/arm/insts/pred_inst.cc12
-rw-r--r--src/arch/arm/insts/pred_inst.hh130
-rw-r--r--src/arch/arm/insts/static_inst.cc89
-rw-r--r--src/arch/arm/insts/static_inst.hh2
4 files changed, 120 insertions, 113 deletions
diff --git a/src/arch/arm/insts/pred_inst.cc b/src/arch/arm/insts/pred_inst.cc
index 539cfc2d2..f98db1c8e 100644
--- a/src/arch/arm/insts/pred_inst.cc
+++ b/src/arch/arm/insts/pred_inst.cc
@@ -32,10 +32,18 @@
namespace ArmISA
{
std::string
-PredOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
+PredIntOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
{
std::stringstream ss;
- printDataInst(ss);
+ printDataInst(ss, false);
+ return ss.str();
+}
+
+std::string
+PredImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
+{
+ std::stringstream ss;
+ printDataInst(ss, true);
return ss.str();
}
diff --git a/src/arch/arm/insts/pred_inst.hh b/src/arch/arm/insts/pred_inst.hh
index 38ac69358..6f9bd9dc2 100644
--- a/src/arch/arm/insts/pred_inst.hh
+++ b/src/arch/arm/insts/pred_inst.hh
@@ -56,8 +56,6 @@ class PredOp : public ArmStaticInst
condCode((ConditionCode)(unsigned)machInst.condCode)
{
}
-
- std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
};
/**
@@ -65,23 +63,25 @@ class PredOp : public ArmStaticInst
*/
class PredImmOp : public PredOp
{
- protected:
-
- uint32_t imm;
- uint32_t rotate;
- uint32_t rotated_imm;
- uint32_t rotated_carry;
-
- /// Constructor
- PredImmOp(const char *mnem, MachInst _machInst, OpClass __opClass) :
- PredOp(mnem, _machInst, __opClass),
- imm(machInst.imm), rotate(machInst.rotate << 1),
- rotated_imm(0), rotated_carry(0)
- {
- rotated_imm = rotate_imm(imm, rotate);
- if (rotate != 0)
- rotated_carry = (rotated_imm >> 31) & 1;
- }
+ protected:
+
+ uint32_t imm;
+ uint32_t rotate;
+ uint32_t rotated_imm;
+ uint32_t rotated_carry;
+
+ /// Constructor
+ PredImmOp(const char *mnem, MachInst _machInst, OpClass __opClass) :
+ PredOp(mnem, _machInst, __opClass),
+ imm(machInst.imm), rotate(machInst.rotate << 1),
+ rotated_imm(0), rotated_carry(0)
+ {
+ rotated_imm = rotate_imm(imm, rotate);
+ if (rotate != 0)
+ rotated_carry = (rotated_imm >> 31) & 1;
+ }
+
+ std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
};
/**
@@ -89,17 +89,19 @@ class PredImmOp : public PredOp
*/
class PredIntOp : public PredOp
{
- protected:
+ protected:
- uint32_t shift_size;
- uint32_t shift;
+ uint32_t shift_size;
+ uint32_t shift;
- /// Constructor
- PredIntOp(const char *mnem, MachInst _machInst, OpClass __opClass) :
- PredOp(mnem, _machInst, __opClass),
- shift_size(machInst.shiftSize), shift(machInst.shift)
- {
- }
+ /// Constructor
+ PredIntOp(const char *mnem, MachInst _machInst, OpClass __opClass) :
+ PredOp(mnem, _machInst, __opClass),
+ shift_size(machInst.shiftSize), shift(machInst.shift)
+ {
+ }
+
+ std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
};
/**
@@ -107,36 +109,36 @@ class PredIntOp : public PredOp
*/
class PredMacroOp : public PredOp
{
- protected:
-
- uint32_t numMicroops;
- StaticInstPtr * microOps;
-
- /// Constructor
- PredMacroOp(const char *mnem, MachInst _machInst, OpClass __opClass) :
- PredOp(mnem, _machInst, __opClass),
- numMicroops(0)
- {
- // We rely on the subclasses of this object to handle the
- // initialization of the micro-operations, since they are
- // all of variable length
- flags[IsMacroop] = true;
- }
-
- ~PredMacroOp()
- {
- if (numMicroops)
- delete [] microOps;
- }
-
- StaticInstPtr
- fetchMicroop(MicroPC microPC)
- {
- assert(microPC < numMicroops);
- return microOps[microPC];
- }
-
- std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+ protected:
+
+ uint32_t numMicroops;
+ StaticInstPtr * microOps;
+
+ /// Constructor
+ PredMacroOp(const char *mnem, MachInst _machInst, OpClass __opClass) :
+ PredOp(mnem, _machInst, __opClass),
+ numMicroops(0)
+ {
+ // We rely on the subclasses of this object to handle the
+ // initialization of the micro-operations, since they are
+ // all of variable length
+ flags[IsMacroop] = true;
+ }
+
+ ~PredMacroOp()
+ {
+ if (numMicroops)
+ delete [] microOps;
+ }
+
+ StaticInstPtr
+ fetchMicroop(MicroPC microPC)
+ {
+ assert(microPC < numMicroops);
+ return microOps[microPC];
+ }
+
+ std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
};
/**
@@ -144,12 +146,12 @@ class PredMacroOp : public PredOp
*/
class PredMicroop : public PredOp
{
- /// Constructor
- PredMicroop(const char *mnem, MachInst _machInst, OpClass __opClass) :
- PredOp(mnem, _machInst, __opClass)
- {
- flags[IsMicroop] = true;
- }
+ /// Constructor
+ PredMicroop(const char *mnem, MachInst _machInst, OpClass __opClass) :
+ PredOp(mnem, _machInst, __opClass)
+ {
+ flags[IsMicroop] = true;
+ }
};
}
diff --git a/src/arch/arm/insts/static_inst.cc b/src/arch/arm/insts/static_inst.cc
index f3ad1127b..df2d5de25 100644
--- a/src/arch/arm/insts/static_inst.cc
+++ b/src/arch/arm/insts/static_inst.cc
@@ -330,61 +330,52 @@ ArmStaticInst::printMemSymbol(std::ostream &os,
void
ArmStaticInst::printShiftOperand(std::ostream &os) const
{
- // Shifter operand
- if (bits((uint32_t)machInst, 25)) {
- // Immediate form
- unsigned rotate = machInst.rotate * 2;
- uint32_t imm = machInst.imm;
- ccprintf(os, "#%#x", (imm << (32 - rotate)) | (imm >> rotate));
- } else {
- // Register form
- printReg(os, machInst.rm);
+ printReg(os, machInst.rm);
- bool immShift = (machInst.opcode4 == 0);
- bool done = false;
- unsigned shiftAmt = (machInst.shiftSize);
- ArmShiftType type = (ArmShiftType)(uint32_t)machInst.shift;
+ bool immShift = (machInst.opcode4 == 0);
+ bool done = false;
+ unsigned shiftAmt = (machInst.shiftSize);
+ ArmShiftType type = (ArmShiftType)(uint32_t)machInst.shift;
- if ((type == LSR || type == ASR) && immShift && shiftAmt == 0)
- shiftAmt = 32;
+ if ((type == LSR || type == ASR) && immShift && shiftAmt == 0)
+ shiftAmt = 32;
- switch (type) {
- case LSL:
- if (immShift && shiftAmt == 0) {
- done = true;
- break;
- }
- os << ", LSL";
- break;
- case LSR:
- os << ", LSR";
- break;
- case ASR:
- os << ", ASR";
- break;
- case ROR:
- if (immShift && shiftAmt == 0) {
- os << ", RRX";
- done = true;
- break;
- }
- os << ", ROR";
+ switch (type) {
+ case LSL:
+ if (immShift && shiftAmt == 0) {
+ done = true;
break;
- default:
- panic("Tried to disassemble unrecognized shift type.\n");
}
- if (!done) {
- os << " ";
- if (immShift)
- os << "#" << shiftAmt;
- else
- printReg(os, machInst.rs);
+ os << ", LSL";
+ break;
+ case LSR:
+ os << ", LSR";
+ break;
+ case ASR:
+ os << ", ASR";
+ break;
+ case ROR:
+ if (immShift && shiftAmt == 0) {
+ os << ", RRX";
+ done = true;
+ break;
}
+ os << ", ROR";
+ break;
+ default:
+ panic("Tried to disassemble unrecognized shift type.\n");
+ }
+ if (!done) {
+ os << " ";
+ if (immShift)
+ os << "#" << shiftAmt;
+ else
+ printReg(os, machInst.rs);
}
}
void
-ArmStaticInst::printDataInst(std::ostream &os) const
+ArmStaticInst::printDataInst(std::ostream &os, bool withImm) const
{
printMnemonic(os, machInst.sField ? "s" : "");
//XXX It would be nice if the decoder figured this all out for us.
@@ -409,7 +400,13 @@ ArmStaticInst::printDataInst(std::ostream &os) const
if (!firstOp)
os << ", ";
- printShiftOperand(os);
+ if (withImm) {
+ unsigned rotate = machInst.rotate * 2;
+ uint32_t imm = machInst.imm;
+ ccprintf(os, "#%#x", (imm << (32 - rotate)) | (imm >> rotate));
+ } else {
+ printShiftOperand(os);
+ }
}
std::string
diff --git a/src/arch/arm/insts/static_inst.hh b/src/arch/arm/insts/static_inst.hh
index 22b59791c..c963c1827 100644
--- a/src/arch/arm/insts/static_inst.hh
+++ b/src/arch/arm/insts/static_inst.hh
@@ -71,7 +71,7 @@ class ArmStaticInst : public StaticInst
void printShiftOperand(std::ostream &os) const;
- void printDataInst(std::ostream &os) const;
+ void printDataInst(std::ostream &os, bool withImm) const;
std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
};