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| author | Gabe Black <gblack@eecs.umich.edu> | 2006-12-20 22:14:40 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2006-12-20 22:14:40 -0500 |
| commit | 68a0e6f2e94dbf4e2533924794d70b7476bee570 (patch) | |
| tree | 28e1be56240001b73ec6302e8e5ec8f66280f7d5 | |
| parent | 327f451eb758b925fe64d7e8d1d6b27bd97fb692 (diff) | |
| download | gem5-68a0e6f2e94dbf4e2533924794d70b7476bee570.tar.xz | |
Fixes to get MIPS_SE to compile.
--HG--
extra : convert_revision : d173f212841341e436e9a38dcd3006d27886c1b8
| -rwxr-xr-x | src/cpu/o3/mips/dyn_inst.hh | 6 | ||||
| -rwxr-xr-x | src/cpu/o3/mips/dyn_inst_impl.hh | 8 |
2 files changed, 9 insertions, 5 deletions
diff --git a/src/cpu/o3/mips/dyn_inst.hh b/src/cpu/o3/mips/dyn_inst.hh index 009a08012..f53530908 100755 --- a/src/cpu/o3/mips/dyn_inst.hh +++ b/src/cpu/o3/mips/dyn_inst.hh @@ -70,8 +70,10 @@ class MipsDynInst : public BaseDynInst<Impl> public: /** BaseDynInst constructor given a binary instruction. */ - MipsDynInst(ExtMachInst inst, Addr PC, Addr Pred_PC, InstSeqNum seq_num, - O3CPU *cpu); + MipsDynInst(ExtMachInst inst, + Addr PC, Addr NPC, + Addr Pred_PC, Addr Pred_NPC, + InstSeqNum seq_num, O3CPU *cpu); /** BaseDynInst constructor given a static inst pointer. */ MipsDynInst(StaticInstPtr &_staticInst); diff --git a/src/cpu/o3/mips/dyn_inst_impl.hh b/src/cpu/o3/mips/dyn_inst_impl.hh index fa8cf6cb4..c0f9ae771 100755 --- a/src/cpu/o3/mips/dyn_inst_impl.hh +++ b/src/cpu/o3/mips/dyn_inst_impl.hh @@ -31,9 +31,11 @@ #include "cpu/o3/mips/dyn_inst.hh" template <class Impl> -MipsDynInst<Impl>::MipsDynInst(ExtMachInst inst, Addr PC, Addr Pred_PC, - InstSeqNum seq_num, O3CPU *cpu) - : BaseDynInst<Impl>(inst, PC, Pred_PC, seq_num, cpu) +MipsDynInst<Impl>::MipsDynInst(ExtMachInst inst, + Addr PC, Addr NPC, + Addr Pred_PC, Addr Pred_NPC, + InstSeqNum seq_num, O3CPU *cpu) + : BaseDynInst<Impl>(inst, PC, NPC, Pred_PC, Pred_NPC, seq_num, cpu) { initVars(); } |