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author | Andrew Schultz <alschult@umich.edu> | 2004-02-03 15:09:09 -0500 |
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committer | Andrew Schultz <alschult@umich.edu> | 2004-02-03 15:09:09 -0500 |
commit | 76461ae54f89af5580df7eb6d26efe7ee94b8e11 (patch) | |
tree | 0c5918170772d5f07b192ebf1113efe7f479b102 | |
parent | 4d3d5d7a3c0609673571e4c86b178cc2f73b9af8 (diff) | |
download | gem5-76461ae54f89af5580df7eb6d26efe7ee94b8e11.tar.xz |
Fix improper shift for loading address
-rw-r--r-- | system/alpha/palcode/platform_m5.s | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/system/alpha/palcode/platform_m5.s b/system/alpha/palcode/platform_m5.s index 9f73767c9..f457147ea 100644 --- a/system/alpha/palcode/platform_m5.s +++ b/system/alpha/palcode/platform_m5.s @@ -799,9 +799,9 @@ sys_int_20: or r31,3,r16 // a0 means it is a I/O interrupt bis r31,0x801,r8 - sll r8,4,r8 + sll r8,16,r8 bis r8,0xa000,r8 - sll r8,4,r8 + sll r8,16,r8 bis r8,0x80,r8 ldl_p r9, 0(r8) // read the MISC register |