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| author | Andreas Sandberg <andreas.sandberg@arm.com> | 2018-02-13 19:01:17 +0000 |
|---|---|---|
| committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2018-02-20 13:30:02 +0000 |
| commit | a3bb33b257324ad9da3e656e30ba61e6f4b5497f (patch) | |
| tree | f96fcfd5b9d68f65af3e62da12a168c3f58a4cc7 | |
| parent | 68eb852d62864b2093c365ce2a80e9fd39908312 (diff) | |
| download | gem5-a3bb33b257324ad9da3e656e30ba61e6f4b5497f.tar.xz | |
cpu-o3: Don't add non-speculative mem barriers to the IQ twice
There are cases where the IEW adds a non-speculative instruction to
the IQ twice. This can happen if an instruction is flagged as
IsMemBarrier and IsNonSpeculative. Avoid adding non-speculative
instructions in the IEW to the IQ by checking if it has been added
already.
Change-Id: Ifcff676a451b57b2406ce00ed8dae19ed399515f
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Javier Setoain <javier.setoain@arm.com>
Reviewed-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/8374
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
| -rw-r--r-- | src/cpu/o3/iew_impl.hh | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/o3/iew_impl.hh b/src/cpu/o3/iew_impl.hh index 80d7adc54..8270a71b5 100644 --- a/src/cpu/o3/iew_impl.hh +++ b/src/cpu/o3/iew_impl.hh @@ -1100,7 +1100,7 @@ DefaultIEW<Impl>::dispatchInsts(ThreadID tid) add_to_iq = true; } - if (inst->isNonSpeculative()) { + if (add_to_iq && inst->isNonSpeculative()) { DPRINTF(IEW, "[tid:%i]: Issue: Nonspeculative instruction " "encountered, skipping.\n", tid); |