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| author | Steve Reinhardt <stever@eecs.umich.edu> | 2006-12-09 22:05:30 -0800 |
|---|---|---|
| committer | Steve Reinhardt <stever@eecs.umich.edu> | 2006-12-09 22:05:30 -0800 |
| commit | cfc6710f633be54b104c2332c4c571d1321d9bbd (patch) | |
| tree | 1db638abb3baad1ee292b2892c5d6238fe068767 | |
| parent | 2e1200e57f1011d5af999dc60b0f9aa4bff5fb09 (diff) | |
| parent | ac32645c27c51f5eb5e20adecab4758352265aa5 (diff) | |
| download | gem5-cfc6710f633be54b104c2332c4c571d1321d9bbd.tar.xz | |
Merge vm1.(none):/home/stever/bk/newmem-head
into vm1.(none):/home/stever/bk/newmem-cache2
--HG--
extra : convert_revision : e1ed5c8edb95e99200b4d26317f55f71338a96df
| -rw-r--r-- | build_opts/SPARC_FS | 1 | ||||
| -rw-r--r-- | build_opts/SPARC_SE | 1 | ||||
| -rw-r--r-- | src/cpu/o3/commit_impl.hh | 6 | ||||
| -rwxr-xr-x | util/regress | 2 |
4 files changed, 6 insertions, 4 deletions
diff --git a/build_opts/SPARC_FS b/build_opts/SPARC_FS index 59d17eee9..7c8bda0ce 100644 --- a/build_opts/SPARC_FS +++ b/build_opts/SPARC_FS @@ -1,2 +1,3 @@ TARGET_ISA = 'sparc' +CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU' FULL_SYSTEM = 1 diff --git a/build_opts/SPARC_SE b/build_opts/SPARC_SE index 3b256fc34..62b6841ad 100644 --- a/build_opts/SPARC_SE +++ b/build_opts/SPARC_SE @@ -1,2 +1,3 @@ TARGET_ISA = 'sparc' +CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU' FULL_SYSTEM = 0 diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh index 43305f962..f400d757b 100644 --- a/src/cpu/o3/commit_impl.hh +++ b/src/cpu/o3/commit_impl.hh @@ -1197,16 +1197,16 @@ DefaultCommit<Impl>::getInsts() rename_idx < fromRename->size; rename_idx++) { DynInstPtr inst = fromRename->insts[rename_idx]; - int tid = inst->threadNumber; if (!inst->isSquashed()) { DPRINTF(Commit, "Inserting PC %#x [sn:%i] [tid:%i] into ", - "skidBuffer.\n", inst->readPC(), inst->seqNum, tid); + "skidBuffer.\n", inst->readPC(), inst->seqNum, + inst->threadNumber); skidBuffer.push(inst); } else { DPRINTF(Commit, "Instruction PC %#x [sn:%i] [tid:%i] was " "squashed, skipping.\n", - inst->readPC(), inst->seqNum, tid); + inst->readPC(), inst->seqNum, inst->threadNumber); } } } diff --git a/util/regress b/util/regress index 8e60b6fee..83d8b4ddc 100755 --- a/util/regress +++ b/util/regress @@ -43,7 +43,7 @@ optparser.add_option('--builds', dest='builds', help='comma-separated list of build targets to test ' " (default: '%default')" ) optparser.add_option('--variants', dest='variants', - default='opt', + default='fast', help='comma-separated list of build variants to test ' " (default: '%default')" ) optparser.add_option('--scons-opts', dest='scons_opts', default='', |