diff options
author | Gabe Black <gblack@eecs.umich.edu> | 2006-09-30 03:03:58 -0400 |
---|---|---|
committer | Gabe Black <gblack@eecs.umich.edu> | 2006-09-30 03:03:58 -0400 |
commit | 333eb4efea55982bc73fae7638bb55fd0e9b5617 (patch) | |
tree | cb502e521ab55402bd44b2928ee3735682c5078c | |
parent | 165b010b2928a2ebb6e080727cda73daede70123 (diff) | |
download | gem5-333eb4efea55982bc73fae7638bb55fd0e9b5617.tar.xz |
Basic work towards supporting ASIs properly
src/arch/sparc/SConscript:
Added a file that implements ASI utility functions. These don't go in utility.hh because they aren't supposed to be part of the generic ISA interface.
src/arch/sparc/asi.hh:
Fixed up some mistranscriptions, and added function prototypes for some ASI utility functions.
src/arch/sparc/asi.cc:
Implementation of some ASI utility functions.
--HG--
extra : convert_revision : 8021007027b13e91cc66908029470da49a8ca11f
-rw-r--r-- | src/arch/sparc/SConscript | 1 | ||||
-rw-r--r-- | src/arch/sparc/asi.cc | 279 | ||||
-rw-r--r-- | src/arch/sparc/asi.hh | 55 |
3 files changed, 318 insertions, 17 deletions
diff --git a/src/arch/sparc/SConscript b/src/arch/sparc/SConscript index 66f2b57e0..e317502e0 100644 --- a/src/arch/sparc/SConscript +++ b/src/arch/sparc/SConscript @@ -44,6 +44,7 @@ Import('env') # Base sources used by all configurations. base_sources = Split(''' + asi.cc faults.cc floatregfile.cc intregfile.cc diff --git a/src/arch/sparc/asi.cc b/src/arch/sparc/asi.cc new file mode 100644 index 000000000..00c9e041e --- /dev/null +++ b/src/arch/sparc/asi.cc @@ -0,0 +1,279 @@ +/* + * Copyright (c) 2006 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Gabe Black + */ + +#include "arch/sparc/asi.hh" + +namespace SparcISA +{ + bool AsiIsBlock(ASI asi) + { + return + (asi == ASI_BLK_AIUP) || + (asi == ASI_BLK_AIUS) || + (asi == ASI_BLK_AIUPL) || + (asi == ASI_BLK_AIUSL) || + (asi == ASI_BLK_P) || + (asi == ASI_BLK_S) || + (asi == ASI_BLK_PL) || + (asi == ASI_BLK_SL); + } + + bool AsiIsPrimary(ASI asi) + { + return + (asi == ASI_AIUP) || + (asi == ASI_BLK_AIUP) || + (asi == ASI_AIUPL) || + (asi == ASI_BLK_AIUPL) || + (asi == ASI_LDTX_AIUP) || + (asi == ASI_LDTX_AIUPL) || + (asi == ASI_P) || + (asi == ASI_PNF) || + (asi == ASI_PL) || + (asi == ASI_PNFL) || + (asi == ASI_PST8_P) || + (asi == ASI_PST16_P) || + (asi == ASI_PST32_P) || + (asi == ASI_PST8_PL) || + (asi == ASI_PST16_PL) || + (asi == ASI_PST32_PL) || + (asi == ASI_FL8_P) || + (asi == ASI_FL16_P) || + (asi == ASI_FL8_PL) || + (asi == ASI_FL16_PL) || + (asi == ASI_LDTX_P) || + (asi == ASI_LDTX_PL) || + (asi == ASI_BLK_P) || + (asi == ASI_BLK_PL); + } + + bool AsiIsSecondary(ASI asi) + { + return + (asi == ASI_AIUS) || + (asi == ASI_BLK_AIUS) || + (asi == ASI_AIUSL) || + (asi == ASI_BLK_AIUSL) || + (asi == ASI_LDTX_AIUS) || + (asi == ASI_LDTX_AIUSL) || + (asi == ASI_S) || + (asi == ASI_SNF) || + (asi == ASI_SL) || + (asi == ASI_SNFL) || + (asi == ASI_PST8_S) || + (asi == ASI_PST16_S) || + (asi == ASI_PST32_S) || + (asi == ASI_PST8_SL) || + (asi == ASI_PST16_SL) || + (asi == ASI_PST32_SL) || + (asi == ASI_FL8_S) || + (asi == ASI_FL16_S) || + (asi == ASI_FL8_SL) || + (asi == ASI_FL16_SL) || + (asi == ASI_LDTX_S) || + (asi == ASI_LDTX_SL) || + (asi == ASI_BLK_S) || + (asi == ASI_BLK_SL); + } + + bool AsiNucleus(ASI asi) + { + return + (asi == ASI_N) || + (asi == ASI_NL) || + (asi == ASI_LDTX_N) || + (asi == ASI_LDTX_NL); + } + + bool AsiIsAsIfUser(ASI asi) + { + return + (asi == ASI_AIUP) || + (asi == ASI_AIUS) || + (asi == ASI_BLK_AIUP) || + (asi == ASI_BLK_AIUS) || + (asi == ASI_AIUPL) || + (asi == ASI_AIUSL) || + (asi == ASI_BLK_AIUPL) || + (asi == ASI_BLK_AIUSL) || + (asi == ASI_LDTX_AIUP) || + (asi == ASI_LDTX_AIUS) || + (asi == ASI_LDTX_AIUPL) || + (asi == ASI_LDTX_AIUSL); + } + + bool AsiIsIO(ASI asi) + { + return + (asi == ASI_REAL_IO) || + (asi == ASI_REAL_IO_L); + } + + bool AsiIsReal(ASI asi) + { + return + (asi == ASI_REAL) || + (asi == ASI_REAL_IO) || + (asi == ASI_REAL_L) || + (asi == ASI_REAL_IO_L) || + (asi == ASI_LDTX_REAL) || + (asi == ASI_LDTX_REAL_L) || + (asi == ASI_MMU_REAL); + } + + bool AsiIsLittle(ASI asi) + { + return + (asi == ASI_NL) || + (asi == ASI_AIUPL) || + (asi == ASI_AIUSL) || + (asi == ASI_REAL_L) || + (asi == ASI_REAL_IO_L) || + (asi == ASI_BLK_AIUPL) || + (asi == ASI_BLK_AIUSL) || + (asi == ASI_LDTX_AIUPL) || + (asi == ASI_LDTX_AIUSL) || + (asi == ASI_LDTX_REAL_L) || + (asi == ASI_LDTX_NL) || + (asi == ASI_PL) || + (asi == ASI_SL) || + (asi == ASI_PNFL) || + (asi == ASI_SNFL) || + (asi == ASI_PST8_PL) || + (asi == ASI_PST8_SL) || + (asi == ASI_PST16_PL) || + (asi == ASI_PST16_SL) || + (asi == ASI_PST32_PL) || + (asi == ASI_PST32_SL) || + (asi == ASI_FL8_PL) || + (asi == ASI_FL8_SL) || + (asi == ASI_FL16_PL) || + (asi == ASI_FL16_SL) || + (asi == ASI_LDTX_PL) || + (asi == ASI_LDTX_SL) || + (asi == ASI_BLK_PL) || + (asi == ASI_BLK_SL); + } + + bool AsiIsTwin(ASI asi) + { + return + (asi == ASI_LDTX_AIUP) || + (asi == ASI_LDTX_AIUS) || + (asi == ASI_LDTX_REAL) || + (asi == ASI_LDTX_N) || + (asi == ASI_LDTX_AIUPL) || + (asi == ASI_LDTX_AIUSL) || + (asi == ASI_LDTX_REAL_L) || + (asi == ASI_LDTX_NL) || + (asi == ASI_LDTX_P) || + (asi == ASI_LDTX_S) || + (asi == ASI_LDTX_PL) || + (asi == ASI_LDTX_SL); + } + + bool AsiIsPartialStore(ASI asi) + { + return + (asi == ASI_PST8_P) || + (asi == ASI_PST8_S) || + (asi == ASI_PST16_P) || + (asi == ASI_PST16_S) || + (asi == ASI_PST32_P) || + (asi == ASI_PST32_S) || + (asi == ASI_PST8_PL) || + (asi == ASI_PST8_SL) || + (asi == ASI_PST16_PL) || + (asi == ASI_PST16_SL) || + (asi == ASI_PST32_PL) || + (asi == ASI_PST32_SL); + } + + bool AsiIsFloatingLoad(ASI asi) + { + return + (asi == ASI_FL8_P) || + (asi == ASI_FL8_S) || + (asi == ASI_FL16_P) || + (asi == ASI_FL16_S) || + (asi == ASI_FL8_PL) || + (asi == ASI_FL8_SL) || + (asi == ASI_FL16_PL) || + (asi == ASI_FL16_SL); + } + + bool AsiIsNoFault(ASI asi) + { + return + (asi == ASI_PNF) || + (asi == ASI_SNF) || + (asi == ASI_PNFL) || + (asi == ASI_SNFL); + } + + bool AsiIsScratchPad(ASI asi) + { + return + (asi == ASI_SCRATCHPAD) || + (asi == ASI_HYP_SCRATCHPAD); + } + + bool AsiIsCmt(ASI asi) + { + return + (asi == ASI_CMT_PER_STRAND) || + (asi == ASI_CMT_SHARED); + } + + bool AsiIsQueue(ASI asi) + { + return asi == ASI_QUEUE; + } + + bool AsiIsDtlb(ASI asi) + { + return + (asi == ASI_DTLB_DATA_IN_REG) || + (asi == ASI_DTLB_DATA_ACCESS_REG) || + (asi == ASI_DTLB_TAG_READ_REG); + } + + bool AsiIsMmu(ASI asi) + { + return + (asi == ASI_MMU_CONTEXTID) || + (asi == ASI_IMMU) || + (asi == ASI_MMU_REAL) || + (asi == ASI_MMU) || + (asi == ASI_DMMU) || + (asi == ASI_UMMU) || + (asi == ASI_DMMU_DEMAP); + } +} diff --git a/src/arch/sparc/asi.hh b/src/arch/sparc/asi.hh index 482e077e0..876567225 100644 --- a/src/arch/sparc/asi.hh +++ b/src/arch/sparc/asi.hh @@ -156,23 +156,23 @@ namespace SparcISA ASI_PST32_SL = 0xCD, ASI_PST32_SECONDARY_LITTLE = ASI_PST32_SL, //0xCE-0xCF implementation dependent - ASI_PL8_P = 0xD0, - ASI_PL8_PRIMARY = ASI_PL8_P, - ASI_PL8_S = 0xD1, - ASI_PL8_SECONDARY = ASI_PL8_S, - ASI_PL16_P = 0xD2, - ASI_PL16_PRIMARY = ASI_PL16_P, - ASI_PL16_S = 0xD3, - ASI_PL16_SECONDARY = ASI_PL16_S, + ASI_FL8_P = 0xD0, + ASI_FL8_PRIMARY = ASI_FL8_P, + ASI_FL8_S = 0xD1, + ASI_FL8_SECONDARY = ASI_FL8_S, + ASI_FL16_P = 0xD2, + ASI_FL16_PRIMARY = ASI_FL16_P, + ASI_FL16_S = 0xD3, + ASI_FL16_SECONDARY = ASI_FL16_S, //0xD4-0xD7 implementation dependent - ASI_PL8_PL = 0xD8, - ASI_PL8_PRIMARY_LITTLE = ASI_PL8_PL, - ASI_PL8_SL = 0xD9, - ASI_PL8_SECONDARY_LITTLE = ASI_PL8_SL, - ASI_PL16_PL = 0xDA, - ASI_PL16_PRIMARY_LITTLE = ASI_PL16_PL, - ASI_PL16_SL = 0xDB, - ASI_PL16_SECONDARY_LITTLE = ASI_PL16_SL, + ASI_FL8_PL = 0xD8, + ASI_FL8_PRIMARY_LITTLE = ASI_FL8_PL, + ASI_FL8_SL = 0xD9, + ASI_FL8_SECONDARY_LITTLE = ASI_FL8_SL, + ASI_FL16_PL = 0xDA, + ASI_FL16_PRIMARY_LITTLE = ASI_FL16_PL, + ASI_FL16_SL = 0xDB, + ASI_FL16_SECONDARY_LITTLE = ASI_FL16_SL, //0xDC-0xDF implementation dependent //0xE0-0xE1 reserved ASI_LDTX_P = 0xE2, @@ -193,9 +193,30 @@ namespace SparcISA ASI_BLK_PL = 0xF8, ASI_BLOCK_PRIMARY_LITTLE = ASI_BLK_PL, ASI_BLK_SL = 0xF9, - ASI_BLOCK_SECONDARY_LITTLE = ASI_BLK_SL + ASI_BLOCK_SECONDARY_LITTLE = ASI_BLK_SL, //0xFA-0xFF implementation dependent + MAX_ASI = 0xFF }; + + //Functions that classify an asi + bool AsiIsBlock(ASI); + bool AsiIsPrimary(ASI); + bool AsiIsSecondary(ASI); + bool AsiIsNucleus(ASI); + bool AsiIsAsIfUser(ASI); + bool AsiIsIO(ASI); + bool AsiIsReal(ASI); + bool AsiIsLittle(ASI); + bool AsiIsTwin(ASI); + bool AsiIsPartialStore(ASI); + bool AsiIsFloatingLoad(ASI); + bool AsiIsNoFault(ASI); + bool AsiIsScratchPad(ASI); + bool AsiIsCmt(ASI); + bool AsiIsQueue(ASI); + bool AsiIsDtlb(ASI); + bool AsiIsMmu(ASI); + }; #endif // __ARCH_SPARC_TLB_HH__ |