X86: Put an SMBios/DMI table in memory.

This is basically just the header right now, but there's an untested
mechanism in place to fill out the table and make sure everything is
updated correctly.

--HG--
extra : convert_revision : c1610c0dfa211b7e0d091a04133695d84f500a1c

5 files changed, 581 insertions, 1 deletions

diff --git a/src/arch/x86/SConscript b/src/arch/x86/SConscript
index 1ce06040f..1b589268d 100644
--- a/src/arch/x86/SConscript
+++ b/src/arch/x86/SConscript
@@ -28,7 +28,7 @@
 #
 # Authors: Gabe Black
 
-# Copyright (c) 2007 The Hewlett-Packard Development Company
+# Copyright (c) 2007-2008 The Hewlett-Packard Development Company
 # All rights reserved.
 #
 # Redistribution and use of this software in source and binary forms,
@@ -114,6 +114,7 @@ if env['TARGET_ISA'] == 'x86':
         # Full-system sources
         Source('linux/system.cc')
         Source('pagetable_walker.cc')
+	Source('smbios.cc')
         Source('system.cc')
         Source('stacktrace.cc')
         Source('vtophys.cc')
diff --git a/src/arch/x86/smbios.cc b/src/arch/x86/smbios.cc
new file mode 100644
index 000000000..319650c1f
--- /dev/null
+++ b/src/arch/x86/smbios.cc
@@ -0,0 +1,245 @@
+/*
+ * Copyright (c) 2008 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+/*
+ * Copyright (c) 2008 The Hewlett-Packard Development Company
+ * All rights reserved.
+ *
+ * Redistribution and use of this software in source and binary forms,
+ * with or without modification, are permitted provided that the
+ * following conditions are met:
+ *
+ * The software must be used only for Non-Commercial Use which means any
+ * use which is NOT directed to receiving any direct monetary
+ * compensation for, or commercial advantage from such use.  Illustrative
+ * examples of non-commercial use are academic research, personal study,
+ * teaching, education and corporate research & development.
+ * Illustrative examples of commercial use are distributing products for
+ * commercial advantage and providing services using the software for
+ * commercial advantage.
+ *
+ * If you wish to use this software or functionality therein that may be
+ * covered by patents for commercial use, please contact:
+ *     Director of Intellectual Property Licensing
+ *     Office of Strategy and Technology
+ *     Hewlett-Packard Company
+ *     1501 Page Mill Road
+ *     Palo Alto, California  94304
+ *
+ * Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.  Redistributions
+ * in binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or
+ * other materials provided with the distribution.  Neither the name of
+ * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.  No right of
+ * sublicense is granted herewith.  Derivatives of the software and
+ * output created using the software may be prepared, but only for
+ * Non-Commercial Uses.  Derivatives of the software may be shared with
+ * others provided: (i) the others agree to abide by the list of
+ * conditions herein which includes the Non-Commercial Use restrictions;
+ * and (ii) such Derivatives of the software include the above copyright
+ * notice to acknowledge the contribution from this software where
+ * applicable, this list of conditions and the disclaimer below.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#include "arch/x86/smbios.hh"
+#include "arch/x86/isa_traits.hh"
+#include "mem/port.hh"
+#include "sim/byteswap.hh"
+#include "sim/host.hh"
+
+const char X86ISA::SMBios::SMBiosTable::SMBiosHeader::anchorString[] = "_SM_";
+const uint8_t X86ISA::SMBios::SMBiosTable::
+        SMBiosHeader::formattedArea[] = {0,0,0,0,0};
+const uint8_t X86ISA::SMBios::SMBiosTable::
+        SMBiosHeader::entryPointLength = 0x1F;
+const uint8_t X86ISA::SMBios::SMBiosTable::
+        SMBiosHeader::entryPointRevision = 0;
+const char X86ISA::SMBios::SMBiosTable::
+        SMBiosHeader::IntermediateHeader::anchorString[] = "_DMI_";
+
+uint16_t
+X86ISA::SMBios::BiosInformation::writeOut(FunctionalPort * port, Addr addr)
+{
+    uint8_t size = SMBiosStructure::writeOut(port, addr);
+
+    port->writeBlob(addr + 0x4, (uint8_t *)(&vendor), 1);
+    port->writeBlob(addr + 0x5, (uint8_t *)(&version), 1);
+
+    uint16_t startingAddrSegmentGuest = X86ISA::htog(startingAddrSegment);
+    port->writeBlob(addr + 0x6, (uint8_t *)(&startingAddrSegmentGuest), 2);
+
+    port->writeBlob(addr + 0x8, (uint8_t *)(&releaseDate), 1);
+    port->writeBlob(addr + 0x9, (uint8_t *)(&romSize), 1);
+
+    uint64_t characteristicsGuest = X86ISA::htog(characteristics);
+    port->writeBlob(addr + 0xA, (uint8_t *)(&characteristicsGuest), 8);
+
+    uint16_t characteristicExtBytesGuest =
+        X86ISA::htog(characteristicExtBytes);
+    port->writeBlob(addr + 0x12, (uint8_t *)(&characteristicExtBytesGuest), 2);
+
+    port->writeBlob(addr + 0x14, (uint8_t *)(&major), 1);
+    port->writeBlob(addr + 0x15, (uint8_t *)(&minor), 1);
+    port->writeBlob(addr + 0x16, (uint8_t *)(&embContFirmwareMajor), 1);
+    port->writeBlob(addr + 0x17, (uint8_t *)(&embContFirmwareMinor), 1);
+
+    writeOutStrings(port, addr + getLength());
+
+    return size;
+}
+
+void
+X86ISA::SMBios::SMBiosTable::writeOut(FunctionalPort * port, Addr addr)
+{
+
+    /*
+     * The main header
+     */
+    uint8_t mainChecksum = 0;
+
+    port->writeBlob(addr, (uint8_t *)smbiosHeader.anchorString, 4);
+    for (int i = 0; i < 4; i++)
+        mainChecksum += smbiosHeader.anchorString[i];
+
+    // The checksum goes here, but we're figuring it out as we go.
+
+    port->writeBlob(addr + 0x5,
+            (uint8_t *)(&smbiosHeader.entryPointLength), 1);
+    mainChecksum += smbiosHeader.entryPointLength;
+    port->writeBlob(addr + 0x6,
+            (uint8_t *)(&smbiosHeader.majorVersion), 1);
+    mainChecksum += smbiosHeader.majorVersion;
+    port->writeBlob(addr + 0x7,
+            (uint8_t *)(&smbiosHeader.minorVersion), 1);
+    mainChecksum += smbiosHeader.minorVersion;
+    // Maximum structure size goes here, but we'll figure it out later.
+    port->writeBlob(addr + 0xA,
+            (uint8_t *)(&smbiosHeader.entryPointRevision), 1);
+    mainChecksum += smbiosHeader.entryPointRevision;
+    port->writeBlob(addr + 0xB,
+            (uint8_t *)(&smbiosHeader.formattedArea), 5);
+    for (int i = 0; i < 5; i++)
+        mainChecksum += smbiosHeader.formattedArea[i];
+
+    /*
+     * The intermediate header
+     */
+    uint8_t intChecksum = 0;
+
+    port->writeBlob(addr + 0x10,
+            (uint8_t *)smbiosHeader.intermediateHeader.anchorString, 5);
+    for (int i = 0; i < 5; i++)
+        intChecksum += smbiosHeader.intermediateHeader.anchorString[i];
+
+    // The checksum goes here, but we're figuring it out as we go.
+    // Then the length of the structure table which we'll find later
+
+    uint32_t tableAddrGuest =
+        X86ISA::htog(smbiosHeader.intermediateHeader.tableAddr);
+    port->writeBlob(addr + 0x18, (uint8_t *)(&tableAddrGuest), 4);
+    for (int i = 0; i < 4; i++) {
+        intChecksum += tableAddrGuest;
+        tableAddrGuest >>= 8;
+    }
+
+    uint16_t numStructs = X86ISA::gtoh(structures.size());
+    port->writeBlob(addr + 0x1C, (uint8_t *)(&numStructs), 2);
+    for (int i = 0; i < 2; i++) {
+        intChecksum += numStructs;
+        numStructs >>= 8;
+    }
+
+    port->writeBlob(addr + 0x1E,
+            (uint8_t *)(&smbiosHeader.intermediateHeader.smbiosBCDRevision),
+            1);
+    intChecksum += smbiosHeader.intermediateHeader.smbiosBCDRevision;
+
+    /*
+     * Structure table
+     */
+
+    Addr base = smbiosHeader.intermediateHeader.tableAddr;
+    Addr offset = 0;
+    uint16_t maxSize = 0;
+    std::vector<SMBiosStructure>::iterator it;
+    for (it = structures.begin(); it != structures.end(); it++) {
+        uint16_t size = it->writeOut(port, base + offset);
+        if (size > maxSize)
+            maxSize = size;
+        offset += size;
+    }
+
+    /*
+     * Header
+     */
+
+    maxSize = X86ISA::htog(maxSize);
+    port->writeBlob(addr + 0x8, (uint8_t *)(&maxSize), 2);
+    for (int i = 0; i < 2; i++) {
+        mainChecksum += maxSize;
+        maxSize >>= 8;
+    }
+
+    // Set the checksum
+    mainChecksum = -mainChecksum;
+    port->writeBlob(addr + 0x4, (uint8_t *)(&mainChecksum), 1);
+
+    /*
+     * Intermediate header
+     */
+
+    uint16_t tableSize = offset;
+    tableSize = X86ISA::htog(tableSize);
+    port->writeBlob(addr + 0x16, (uint8_t *)(&tableSize), 2);
+    for (int i = 0; i < 2; i++) {
+        intChecksum += tableSize;
+        tableSize >>= 8;
+    }
+
+    intChecksum = -intChecksum;
+    port->writeBlob(addr + 0x15, (uint8_t *)(&intChecksum), 1);
+}
diff --git a/src/arch/x86/smbios.hh b/src/arch/x86/smbios.hh
new file mode 100644
index 000000000..c126de220
--- /dev/null
+++ b/src/arch/x86/smbios.hh
@@ -0,0 +1,292 @@
+/*
+ * Copyright (c) 2008 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+/*
+ * Copyright (c) 2008 The Hewlett-Packard Development Company
+ * All rights reserved.
+ *
+ * Redistribution and use of this software in source and binary forms,
+ * with or without modification, are permitted provided that the
+ * following conditions are met:
+ *
+ * The software must be used only for Non-Commercial Use which means any
+ * use which is NOT directed to receiving any direct monetary
+ * compensation for, or commercial advantage from such use.  Illustrative
+ * examples of non-commercial use are academic research, personal study,
+ * teaching, education and corporate research & development.
+ * Illustrative examples of commercial use are distributing products for
+ * commercial advantage and providing services using the software for
+ * commercial advantage.
+ *
+ * If you wish to use this software or functionality therein that may be
+ * covered by patents for commercial use, please contact:
+ *     Director of Intellectual Property Licensing
+ *     Office of Strategy and Technology
+ *     Hewlett-Packard Company
+ *     1501 Page Mill Road
+ *     Palo Alto, California  94304
+ *
+ * Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.  Redistributions
+ * in binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or
+ * other materials provided with the distribution.  Neither the name of
+ * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.  No right of
+ * sublicense is granted herewith.  Derivatives of the software and
+ * output created using the software may be prepared, but only for
+ * Non-Commercial Uses.  Derivatives of the software may be shared with
+ * others provided: (i) the others agree to abide by the list of
+ * conditions herein which includes the Non-Commercial Use restrictions;
+ * and (ii) such Derivatives of the software include the above copyright
+ * notice to acknowledge the contribution from this software where
+ * applicable, this list of conditions and the disclaimer below.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#ifndef __ARCH_X86_SMBIOS_HH__
+#define __ARCH_X86_SMBIOS_HH__
+
+#include <string>
+#include <vector>
+
+#include "arch/x86/isa_traits.hh"
+#include "mem/port.hh"
+#include "sim/byteswap.hh"
+#include "sim/host.hh"
+
+namespace X86ISA
+{
+
+namespace SMBios
+{
+
+class SMBiosStructure
+{
+  public:
+
+    virtual
+    ~SMBiosStructure()
+    {}
+
+    // Offset 00h, 1 byte
+    uint8_t type;
+
+    // Offset 01h, 1 byte
+    //Length: computed when written to memory.
+
+    // Offset 02h, 2 bytes
+    uint16_t handle;
+
+    virtual uint8_t
+    getLength()
+    {
+        // This is the size of a structure with nothing but the header
+        return 4;
+    }
+
+    virtual uint16_t
+    writeOut(FunctionalPort * port, Addr addr)
+    {
+        port->writeBlob(addr, (uint8_t *)(&type), 1);
+
+        uint8_t length = getLength();
+        port->writeBlob(addr + 1, (uint8_t *)(&length), 1);
+
+        uint16_t handleGuest = X86ISA::htog(handle);
+        port->writeBlob(addr + 2, (uint8_t *)(&handleGuest), 2);
+
+        return length + getStringLength();
+    }
+
+  protected:
+    std::vector<std::string> strings;
+
+    void writeOutStrings(FunctionalPort * port, Addr addr)
+    {
+        std::vector<std::string>::iterator it;
+        Addr offset = 0;
+
+        for (it = strings.begin(); it != strings.end(); it++) {
+            port->writeBlob(addr + offset,
+                    (uint8_t *)it->c_str(), it->length() + 1);
+            offset += it->length() + 1;
+        }
+
+        const uint8_t nullTerminator = 0;
+        port->writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1);
+    }
+
+    int getStringLength()
+    {
+        int size = 0;
+        std::vector<std::string>::iterator it;
+
+        for (it = strings.begin(); it != strings.end(); it++) {
+            size += it->length() + 1;
+        }
+
+        return size + 1;
+    }
+
+  public:
+
+    int addString(std::string & newString)
+    {
+        strings.push_back(newString);
+        return strings.size();
+    }
+
+    std::string readString(int n)
+    {
+        assert(n > 0 && n <= strings.size());
+        return strings[n - 1];
+    }
+
+    void setString(int n, std::string & newString)
+    {
+        assert(n > 0 && n <= strings.size());
+        strings[n - 1] = newString;
+    }
+};
+
+class BiosInformation : public SMBiosStructure
+{
+  public:
+    // Offset 04h, 1 byte
+    uint8_t vendor;
+    // Offset 05h, 1 byte
+    uint8_t version;
+    // Offset 06h, 2 bytes
+    uint16_t startingAddrSegment;
+    // Offset 08h, 1 byte
+    uint8_t releaseDate;
+    // Offset 09h, 1 byte
+    uint8_t romSize;
+    // Offset 0Ah, 8 bytes
+    //See tables in 3.3.1 in the SMBios 2.5 spec from the DMTF for
+    //bit definitions.
+    uint64_t characteristics;
+    // Offset 12h, 2 bytes
+    uint16_t characteristicExtBytes;
+    // Offset 14h, 1 byte
+    uint8_t major;
+    // Offset 15h, 1 byte
+    uint8_t minor;
+    // Offset 16h, 1 byte
+    uint8_t embContFirmwareMajor;
+    // Offset 17h, 1 byte
+    uint8_t embContFirmwareMinor;
+
+    uint8_t getLength() { return 0x18; }
+    uint16_t writeOut(FunctionalPort * port, Addr addr);
+};
+
+class SMBiosTable
+{
+  public:
+    struct SMBiosHeader
+    {
+        SMBiosHeader()
+        {}
+
+        // Offset 00h, 4 bytes
+        static const char anchorString[];
+
+        // Offset 04h, 1 byte
+        //Checksum: computed when written to memory.
+
+        // Offset 05h, 1 byte
+        static const uint8_t entryPointLength;
+
+        // Offset 06h, 1 byte
+        uint8_t majorVersion;
+
+        // Offset 07h, 1 byte
+        uint8_t minorVersion;
+
+        // Offset 08h, 2 bytes
+        //Maximum structure size: computed when written to memory.
+
+        // Offset 0Ah, 1 byte
+        static const uint8_t entryPointRevision;
+
+        // Offset 0Bh, 5 bytes
+        static const uint8_t formattedArea[5];
+
+        // Offset 10h, 15 bytes
+        struct IntermediateHeader
+        {
+            IntermediateHeader() : tableAddr(0)
+            {}
+            // Offset 10h, 5 bytes
+            static const char anchorString[];
+
+            // Offset 15h, 1 byte
+            //Checksum: computed when written to memory.
+
+            // Offset 16h, 2 bytes
+            //Length of the structure table in bytes: computed when
+            //written to memory.
+
+            // Offset 18h, 4 bytes
+            uint32_t tableAddr;
+
+            // Offset 1Ch, 2 bytes
+            //Number of structures: computed when written to memory
+
+            // Offset 1Eh, 1 byte
+            uint8_t smbiosBCDRevision;
+        } intermediateHeader;
+    } smbiosHeader;
+
+    void writeOut(FunctionalPort * port, Addr addr);
+
+    std::vector<SMBiosStructure> structures;
+};
+
+} //SMBios
+} //X86ISA
+
+#endif
diff --git a/src/arch/x86/system.cc b/src/arch/x86/system.cc
index e0ef5dec0..947a7793e 100644
--- a/src/arch/x86/system.cc
+++ b/src/arch/x86/system.cc
@@ -57,6 +57,7 @@
 
 #include "arch/x86/miscregs.hh"
 #include "arch/x86/system.hh"
+#include "arch/x86/smbios.hh"
 #include "arch/vtophys.hh"
 #include "base/remote_gdb.hh"
 #include "base/loader/object_file.hh"
@@ -74,6 +75,10 @@ using namespace X86ISA;
 X86System::X86System(Params *p)
     : System(p)
 {
+    smbiosTable = new X86ISA::SMBios::SMBiosTable;
+    smbiosTable->smbiosHeader.majorVersion = 2;
+    smbiosTable->smbiosHeader.minorVersion = 5;
+    smbiosTable->smbiosHeader.intermediateHeader.smbiosBCDRevision = 0x25;
 }
 
 void
@@ -230,10 +235,34 @@ X86System::startup()
     threadContexts[0]->setNextPC(threadContexts[0]->readPC());
 
     // We should now be in long mode. Yay!
+
+    //Write out the SMBios/DMI table
+    writeOutSMBiosTable(0xF0000);
+}
+
+void
+X86System::writeOutSMBiosTable(Addr header, Addr table)
+{
+    // Get a port to write the table and header to memory.
+    FunctionalPort * physPort = threadContexts[0]->getPhysPort();
+
+    // If the table location isn't specified, just put it after the header.
+    // The header size as of the 2.5 SMBios specification is 0x1F bytes
+    if (!table) {
+        if (!smbiosTable->smbiosHeader.intermediateHeader.tableAddr)
+            smbiosTable->smbiosHeader.
+                intermediateHeader.tableAddr = header + 0x1F;
+    } else {
+        smbiosTable->smbiosHeader.intermediateHeader.tableAddr = table;
+    }
+
+    smbiosTable->writeOut(physPort, header);
 }
 
+
 X86System::~X86System()
 {
+    delete smbiosTable;
 }
 
 void
diff --git a/src/arch/x86/system.hh b/src/arch/x86/system.hh
index 5a2452a2f..8a5483ebf 100644
--- a/src/arch/x86/system.hh
+++ b/src/arch/x86/system.hh
@@ -68,6 +68,14 @@
 #include "sim/sim_object.hh"
 #include "sim/system.hh"
 
+namespace X86ISA
+{
+    namespace SMBios
+    {
+        class SMBiosTable;
+    }
+}
+
 class X86System : public System
 {
   public:
@@ -85,6 +93,11 @@ class X86System : public System
     void startup();
 
   protected:
+
+    X86ISA::SMBios::SMBiosTable * smbiosTable;
+
+    void writeOutSMBiosTable(Addr header, Addr table = 0);
+
     const Params *params() const { return (const Params *)_params; }
 
     virtual Addr fixFuncEventAddr(Addr addr)