energy: Memory-mapped Energy Controller component

This patch provides an Energy Controller device that provides software
(driver) access to a DVFS handler. The device is currently residing in
the dev/arm tree, but there is nothing inherently ARM specific in the
behaviour. It is currently only tested and supported for ARM Linux,
hence the location.

4 files changed, 501 insertions, 0 deletions

diff --git a/src/dev/arm/EnergyCtrl.py b/src/dev/arm/EnergyCtrl.py
new file mode 100644
index 000000000..4e504bf80
--- /dev/null
+++ b/src/dev/arm/EnergyCtrl.py
@@ -0,0 +1,47 @@
+# Copyright (c) 2012-2014 ARM Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder.  You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Vasileios Spiliopoulos
+#          Akash Bagdia
+
+from m5.params import *
+from m5.SimObject import SimObject
+from Device import BasicPioDevice
+from m5.proxy import *
+
+class EnergyCtrl(BasicPioDevice):
+    type = 'EnergyCtrl'
+    cxx_header = "dev/arm/energy_ctrl.hh"
+    dvfs_handler = Param.DVFSHandler(Parent.dvfs_handler, "DVFS handler")
diff --git a/src/dev/arm/SConscript b/src/dev/arm/SConscript
index 419e2f471..ad6a22b55 100644
--- a/src/dev/arm/SConscript
+++ b/src/dev/arm/SConscript
@@ -42,6 +42,7 @@ Import('*')
 if env['TARGET_ISA'] == 'arm':
     SimObject('Gic.py')
     SimObject('RealView.py')
+    SimObject('EnergyCtrl.py')
 
     Source('a9scu.cc')
     Source('amba_device.cc')
@@ -59,6 +60,7 @@ if env['TARGET_ISA'] == 'arm':
     Source('rtc_pl031.cc')
     Source('timer_cpulocal.cc')
     Source('vgic.cc')
+    Source('energy_ctrl.cc')
 
     DebugFlag('AMBA')
     DebugFlag('HDLcd')
@@ -66,4 +68,5 @@ if env['TARGET_ISA'] == 'arm':
     DebugFlag('Pl050')
     DebugFlag('GIC')
     DebugFlag('RVCTRL')
+    DebugFlag('EnergyCtrl')
     DebugFlag('VGIC')
diff --git a/src/dev/arm/energy_ctrl.cc b/src/dev/arm/energy_ctrl.cc
new file mode 100644
index 000000000..cbfa5aa79
--- /dev/null
+++ b/src/dev/arm/energy_ctrl.cc
@@ -0,0 +1,264 @@
+/*
+ * Copyright (c) 2012-2014 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Vasileios Spiliopoulos
+ *          Akash Bagdia
+ *          Stephan Diestelhorst
+ */
+
+#include "debug/EnergyCtrl.hh"
+#include "dev/arm/energy_ctrl.hh"
+#include "mem/packet.hh"
+#include "mem/packet_access.hh"
+#include "params/EnergyCtrl.hh"
+#include "sim/dvfs_handler.hh"
+
+EnergyCtrl::EnergyCtrl(const Params *p)
+    : BasicPioDevice(p, PIO_NUM_FIELDS * 4),        // each field is 32 bit
+      dvfsHandler(p->dvfs_handler),
+      domainID(0),
+      domainIDIndexToRead(0),
+      perfLevelAck(0),
+      perfLevelToRead(0),
+      updateAckEvent(this)
+{
+    fatal_if(!p->dvfs_handler, "EnergyCtrl: Needs a DVFSHandler for a "
+             "functioning system.\n");
+}
+
+Tick
+EnergyCtrl::read(PacketPtr pkt)
+{
+    assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
+    assert(pkt->getSize() == 4);
+    pkt->allocate();
+
+    Addr daddr = pkt->getAddr() - pioAddr;
+    assert((daddr & 3) == 0);
+    Registers reg = Registers(daddr / 4);
+
+    if (!dvfsHandler->isEnabled()) {
+        // NB: Zero is a good response if the handler is disabled
+        pkt->set<uint32_t>(0);
+        warn_once("EnergyCtrl: Disabled handler, ignoring read from reg %i\n",
+                  reg);
+        DPRINTF(EnergyCtrl, "dvfs handler disabled, return 0 for read from "\
+                "reg %i\n", reg);
+        pkt->makeAtomicResponse();
+        return pioDelay;
+    }
+
+    uint32_t result = 0;
+    Tick period;
+    double voltage;
+
+    switch(reg) {
+      case DVFS_HANDLER_STATUS:
+        result = 1;
+        DPRINTF(EnergyCtrl, "dvfs handler enabled\n");
+        break;
+      case DVFS_NUM_DOMAINS:
+        result = dvfsHandler->numDomains();
+        DPRINTF(EnergyCtrl, "reading number of domains %d\n", result);
+        break;
+      case DVFS_DOMAINID_AT_INDEX:
+        result = dvfsHandler->domainID(domainIDIndexToRead);
+        DPRINTF(EnergyCtrl, "reading domain id at index %d as %d\n",
+                domainIDIndexToRead, result);
+        break;
+      case DVFS_HANDLER_TRANS_LATENCY:
+        // Return transition latency in nanoseconds
+        result = dvfsHandler->transLatency() / SimClock::Int::ns;
+        DPRINTF(EnergyCtrl, "reading dvfs handler trans latency %d ns\n",
+                result);
+        break;
+      case DOMAIN_ID:
+        result = domainID;
+        DPRINTF(EnergyCtrl, "reading domain id:%d\n", result);
+        break;
+      case PERF_LEVEL:
+        result = dvfsHandler->perfLevel(domainID);
+        DPRINTF(EnergyCtrl, "reading domain %d perf level: %d\n",
+                domainID, result);
+        break;
+      case PERF_LEVEL_ACK:
+        result = perfLevelAck;
+        DPRINTF(EnergyCtrl, "reading ack:%d\n", result);
+        // Signal is set for a single read only
+        if (result == 1)
+            perfLevelAck = 0;
+        break;
+      case NUM_OF_PERF_LEVELS:
+        result = dvfsHandler->numPerfLevels(domainID);
+        DPRINTF(EnergyCtrl, "reading num of perf level:%d\n", result);
+        break;
+      case FREQ_AT_PERF_LEVEL:
+        period = dvfsHandler->clkPeriodAtPerfLevel(domainID, perfLevelToRead);
+        result = ticksTokHz(period);
+        DPRINTF(EnergyCtrl, "reading freq %d KHz at perf level: %d\n",
+                result, perfLevelToRead);
+        break;
+      case VOLT_AT_PERF_LEVEL:
+        voltage = dvfsHandler->voltageAtPerfLevel(domainID, perfLevelToRead);
+        result = toMicroVolt(voltage);
+        DPRINTF(EnergyCtrl, "reading voltage %d u-volt at perf level: %d\n",
+                result, perfLevelToRead);
+        break;
+      default:
+        panic("Tried to read EnergyCtrl at offset %#x / reg %i\n", daddr,
+              reg);
+    }
+    pkt->set<uint32_t>(result);
+    pkt->makeAtomicResponse();
+    return pioDelay;
+}
+
+Tick
+EnergyCtrl::write(PacketPtr pkt)
+{
+    assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
+    assert(pkt->getSize() == 4);
+
+    uint32_t data;
+    data = pkt->get<uint32_t>();
+
+    Addr daddr = pkt->getAddr() - pioAddr;
+    assert((daddr & 3) == 0);
+    Registers reg = Registers(daddr / 4);
+
+    if (!dvfsHandler->isEnabled()) {
+        // Ignore writes to a disabled controller
+        warn_once("EnergyCtrl: Disabled handler, ignoring write %u to "\
+                  "reg %i\n", data, reg);
+        DPRINTF(EnergyCtrl, "dvfs handler disabled, ignoring write %u to "\
+                "reg %i\n", data, reg);
+        pkt->makeAtomicResponse();
+        return pioDelay;
+    }
+
+    switch(reg) {
+      case DVFS_DOMAINID_AT_INDEX:
+        domainIDIndexToRead = data;
+        DPRINTF(EnergyCtrl, "writing domain id index:%d\n",
+                domainIDIndexToRead);
+        break;
+      case DOMAIN_ID:
+        // Extra check to ensure that a valid domain ID is being queried
+        if (dvfsHandler->validDomainID(data)) {
+            domainID = data;
+            DPRINTF(EnergyCtrl, "writing domain id:%d\n", domainID);
+        } else {
+           DPRINTF(EnergyCtrl, "invalid domain id:%d\n", domainID);
+        }
+        break;
+      case PERF_LEVEL:
+        if (dvfsHandler->perfLevel(domainID, data)) {
+            if (updateAckEvent.scheduled()) {
+                // The OS driver is trying to change the perf level while
+                // another change is in flight.  This is fine, but only a
+                // single acknowledgment will be sent.
+                DPRINTF(EnergyCtrl, "descheduling previous pending ack "\
+                        "event\n");
+                deschedule(updateAckEvent);
+            }
+            schedule(updateAckEvent, curTick() + dvfsHandler->transLatency());
+            DPRINTF(EnergyCtrl, "writing domain %d perf level: %d\n",
+                    domainID, data);
+        } else {
+            DPRINTF(EnergyCtrl, "invalid / ineffective perf level:%d for "\
+                    "domain:%d\n", data, domainID);
+        }
+        break;
+      case PERF_LEVEL_TO_READ:
+        perfLevelToRead = data;
+        DPRINTF(EnergyCtrl, "writing perf level to read opp at: %d\n",
+                data);
+        break;
+      default:
+        panic("Tried to write EnergyCtrl at offset %#x\n", daddr);
+        break;
+    }
+
+    pkt->makeAtomicResponse();
+    return pioDelay;
+}
+
+void
+EnergyCtrl::serialize(std::ostream &os)
+{
+    SERIALIZE_SCALAR(domainID);
+    SERIALIZE_SCALAR(domainIDIndexToRead);
+    SERIALIZE_SCALAR(perfLevelToRead);
+    SERIALIZE_SCALAR(perfLevelAck);
+
+    Tick next_event = updateAckEvent.scheduled() ? updateAckEvent.when() : 0;
+    SERIALIZE_SCALAR(next_event);
+}
+
+void
+EnergyCtrl::unserialize(Checkpoint *cp, const std::string &section)
+{
+    UNSERIALIZE_SCALAR(domainID);
+    UNSERIALIZE_SCALAR(domainIDIndexToRead);
+    UNSERIALIZE_SCALAR(perfLevelToRead);
+    UNSERIALIZE_SCALAR(perfLevelAck);
+    Tick next_event = 0;
+    UNSERIALIZE_SCALAR(next_event);
+
+    // restore scheduled events
+    if (next_event != 0) {
+        schedule(updateAckEvent, next_event);
+    }
+}
+
+EnergyCtrl * EnergyCtrlParams::create()
+{
+    return new EnergyCtrl(this);
+}
+
+void
+EnergyCtrl::startup()
+{
+    if (!dvfsHandler->isEnabled()) {
+        warn("Existing EnergyCtrl, but no enabled DVFSHandler found.\n");
+    }
+}
+
+void
+EnergyCtrl::init()
+{
+    BasicPioDevice::init();
+}
diff --git a/src/dev/arm/energy_ctrl.hh b/src/dev/arm/energy_ctrl.hh
new file mode 100644
index 000000000..54a690679
--- /dev/null
+++ b/src/dev/arm/energy_ctrl.hh
@@ -0,0 +1,187 @@
+/*
+ * Copyright (c) 2012-2014 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Vasileios Spiliopoulos
+ *          Akash Bagdia
+ *          Stephan Diestelhorst
+ */
+
+/**
+ * @file
+ * The energy controller is a device being used to manage power and energy
+ * related control operations within the system. It provides the necessary
+ * software interface to the kernel. The kernel will require gem5 specific
+ * drivers to access this device.
+ *
+ * Tasks handled by the controller are:
+ * a) Dynamic voltage and frequency scaling control operations
+ *
+ * Note that the registers defined do not resemble any specific controller
+ * device in real hardware. They are currently design to accomodate the gem5
+ * system requirements.
+ */
+
+#ifndef __DEV_ARM_ENERGY_CTRL_HH__
+#define __DEV_ARM_ENERGY_CTRL_HH__
+
+#include "dev/io_device.hh"
+#include "params/EnergyCtrl.hh"
+
+class DVFSHandler;
+
+class EnergyCtrl : public BasicPioDevice
+{
+  public:
+    /**
+     * Discovery flows:
+     * ----------------
+     *   * get basic DVFS handler information
+     *     read(DVFS_HANDLER_STATUS)
+     *     read(DVFS_HANDLER_TRANS_LATENCY)
+     *
+     *   * get the number of domain IDs
+     *     read(DVFS_NUM_DOMAINS) -> domains
+     *
+     *   * query the driver to get the IDs for all i in domains
+     *     write(DVFS_DOMAINID_AT_INDEX <- i)
+     *     read(DOMAIN_ID) -> domainID_i
+     *
+     *   * for each domainID i get voltage / frequency pairs
+     *     write(DOMAIN_ID <- domainID_i)
+     *     read(NUM_OF_PERF_LEVELS) -> levels_i
+     *     * for each l in levels_i
+     *       write(PERF_LEVEL_TO_READ <- l)
+     *       read(FREQ_AT_PERF_LEVEL) -> freq_l_i
+     *       read(VOLT_AT_PERF_LEVEL) -> volt_l_i
+     *
+     *
+     * Setting a specific performance level (V/F combination)
+     * ------------------------------------------------------
+     *   * get performance for domain_ID i
+     *     write(DOMAIN_ID <- i)
+     *     read(PERF_LEVEL) -> perf_level_i
+     *
+     *   * set performance for domain_ID i
+     *     write(DOMAIN_ID <- i)
+     *     write(PERF_LEVEL <- perf_level_i)
+     *     * wait for DVFS transition completion
+     *       while (!read(PERF_LEVEL_ACK));
+     */
+
+    enum Registers {
+        DVFS_HANDLER_STATUS = 0,
+        DVFS_NUM_DOMAINS,
+        DVFS_DOMAINID_AT_INDEX,
+        DVFS_HANDLER_TRANS_LATENCY,
+        DOMAIN_ID,
+        PERF_LEVEL,
+        PERF_LEVEL_ACK,
+        NUM_OF_PERF_LEVELS,
+        PERF_LEVEL_TO_READ,
+        FREQ_AT_PERF_LEVEL,
+        VOLT_AT_PERF_LEVEL,
+        PIO_NUM_FIELDS
+    };
+
+    typedef EnergyCtrlParams Params;
+    EnergyCtrl(const Params *p);
+
+    /**
+     * Read command sent to the device
+     * @param pkt Packet describing this request
+     * @return number of ticks it took to complete
+     */
+    virtual Tick read(PacketPtr pkt);
+    /**
+     * Write command sent to the device
+     * @param pkt Packet describing this request
+     * @return number of ticks it took to complete
+     */
+    virtual Tick write(PacketPtr pkt);
+
+    void serialize(std::ostream &os);
+    void unserialize(Checkpoint *cp, const std::string &section);
+
+    void startup();
+    void init();
+
+  private:
+    DVFSHandler *dvfsHandler;
+
+    /**
+     * Cluster ID (DOMAIN_ID) R/W register, programmed to ID of the domain for
+     * which the set/get performance level command can be issued
+     */
+    uint32_t domainID;
+
+    /**
+     * Index for getting the domain ID from the domain ID list available with
+     * the DVFS handler
+     */
+    uint32_t domainIDIndexToRead;
+
+    /**
+     * Acknowledgment (PERF_LEVEL_ACK) RO register, software polls this
+     * register to read back the status of the last programmed change in the
+     * domain ID and/or the performance level. Valid values are:
+     * '0' - Ack is not OK yet
+     * '1' - Ack is OK
+     * It is a read destructive register with a read of '1' resets the ack to
+     * '0'.
+     */
+    uint32_t perfLevelAck;
+
+    uint32_t perfLevelToRead;
+
+    static uint32_t ticksTokHz(Tick period) {
+        return (uint32_t)(SimClock::Int::ms / period);
+    }
+
+    static uint32_t toMicroVolt(double voltage) {
+        return (uint32_t)(voltage * 1000000);
+    }
+
+    /**
+      * Update the acknowledgment that is read back by the software to confirm
+      * newly requested performance level has been set.
+     */
+    void updatePLAck() {
+        perfLevelAck = 1;
+    }
+
+    EventWrapper<EnergyCtrl, &EnergyCtrl::updatePLAck> updateAckEvent;
+};
+#endif //__DEV_ARM_ENERGY_CTRL_HH__