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authorTushar Krishna <tushar@ece.gatech.edu>2016-10-06 14:35:20 -0400
committerTushar Krishna <tushar@ece.gatech.edu>2016-10-06 14:35:20 -0400
commit0962d768270696395dacfbd2ceabe4ee1035a496 (patch)
tree21feb5b3453c613dd4c35f0177b5333f97a5d967
parent003c08fa90f8b3eb7fbbbc96e0caa5f46bf58196 (diff)
downloadgem5-0962d768270696395dacfbd2ceabe4ee1035a496.tar.xz
config: add port directions and per-router delay in topology.
This patch adds port direction names to the links during topology creation, which can be used for better printed names for the links or for users to code up their own adaptive routing algorithms. It also adds support for every router to have an independent latency value to support heterogeneous topologies with the subsequent garnet2.0 patch.
-rw-r--r--configs/topologies/Mesh_XY.py8
-rw-r--r--src/mem/ruby/network/BasicLink.py8
-rw-r--r--src/mem/ruby/network/BasicRouter.cc1
-rw-r--r--src/mem/ruby/network/BasicRouter.hh1
-rw-r--r--src/mem/ruby/network/BasicRouter.py1
-rw-r--r--src/mem/ruby/network/Network.hh4
-rw-r--r--src/mem/ruby/network/Topology.cc15
-rw-r--r--src/mem/ruby/network/Topology.hh7
-rw-r--r--src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.cc4
-rw-r--r--src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh4
-rw-r--r--src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.cc4
-rw-r--r--src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.hh4
-rw-r--r--src/mem/ruby/network/simple/SimpleNetwork.cc4
-rw-r--r--src/mem/ruby/network/simple/SimpleNetwork.hh4
14 files changed, 57 insertions, 12 deletions
diff --git a/configs/topologies/Mesh_XY.py b/configs/topologies/Mesh_XY.py
index adf3ebe49..134a5c07d 100644
--- a/configs/topologies/Mesh_XY.py
+++ b/configs/topologies/Mesh_XY.py
@@ -109,6 +109,8 @@ class Mesh_XY(SimpleTopology):
int_links.append(IntLink(link_id=link_count,
src_node=routers[east_out],
dst_node=routers[west_in],
+ src_outport="East",
+ dst_inport="West",
weight=1))
link_count += 1
@@ -121,6 +123,8 @@ class Mesh_XY(SimpleTopology):
int_links.append(IntLink(link_id=link_count,
src_node=routers[west_out],
dst_node=routers[east_in],
+ src_outport="West",
+ dst_inport="East",
weight=1))
link_count += 1
@@ -133,6 +137,8 @@ class Mesh_XY(SimpleTopology):
int_links.append(IntLink(link_id=link_count,
src_node=routers[north_out],
dst_node=routers[south_in],
+ src_outport="North",
+ dst_inport="South",
weight=2))
link_count += 1
@@ -145,6 +151,8 @@ class Mesh_XY(SimpleTopology):
int_links.append(IntLink(link_id=link_count,
src_node=routers[south_out],
dst_node=routers[north_in],
+ src_outport="South",
+ dst_inport="North",
weight=2))
link_count += 1
diff --git a/src/mem/ruby/network/BasicLink.py b/src/mem/ruby/network/BasicLink.py
index 5da5dc6a2..e3d72700d 100644
--- a/src/mem/ruby/network/BasicLink.py
+++ b/src/mem/ruby/network/BasicLink.py
@@ -46,11 +46,17 @@ class BasicExtLink(BasicLink):
cxx_header = "mem/ruby/network/BasicLink.hh"
ext_node = Param.RubyController("External node")
int_node = Param.BasicRouter("ID of internal node")
- bandwidth_factor = 16
+ bandwidth_factor = 16 # only used by simple network
class BasicIntLink(BasicLink):
type = 'BasicIntLink'
cxx_header = "mem/ruby/network/BasicLink.hh"
src_node = Param.BasicRouter("Router on src end")
dst_node = Param.BasicRouter("Router on dst end")
+
+ # only used by Garnet.
+ src_outport = Param.String("", "Outport direction at src router")
+ dst_inport = Param.String("", "Inport direction at dst router")
+
+ # only used by simple network
bandwidth_factor = 16
diff --git a/src/mem/ruby/network/BasicRouter.cc b/src/mem/ruby/network/BasicRouter.cc
index 96564ad0f..644d3599a 100644
--- a/src/mem/ruby/network/BasicRouter.cc
+++ b/src/mem/ruby/network/BasicRouter.cc
@@ -32,6 +32,7 @@ BasicRouter::BasicRouter(const Params *p)
: ClockedObject(p)
{
m_id = p->router_id;
+ m_latency = p->latency;
}
void
diff --git a/src/mem/ruby/network/BasicRouter.hh b/src/mem/ruby/network/BasicRouter.hh
index 9f2d0ecd9..2c8905675 100644
--- a/src/mem/ruby/network/BasicRouter.hh
+++ b/src/mem/ruby/network/BasicRouter.hh
@@ -51,6 +51,7 @@ class BasicRouter : public ClockedObject
// ID in relation to other routers in the system
//
uint32_t m_id;
+ uint32_t m_latency;
};
inline std::ostream&
diff --git a/src/mem/ruby/network/BasicRouter.py b/src/mem/ruby/network/BasicRouter.py
index c487e8632..28fcdc47e 100644
--- a/src/mem/ruby/network/BasicRouter.py
+++ b/src/mem/ruby/network/BasicRouter.py
@@ -34,3 +34,4 @@ class BasicRouter(ClockedObject):
type = 'BasicRouter'
cxx_header = "mem/ruby/network/BasicRouter.hh"
router_id = Param.Int("ID in relation to other routers")
+ latency = Param.Cycles(1, "number of cycles inside router")
diff --git a/src/mem/ruby/network/Network.hh b/src/mem/ruby/network/Network.hh
index 529408696..4c0d4edfc 100644
--- a/src/mem/ruby/network/Network.hh
+++ b/src/mem/ruby/network/Network.hh
@@ -85,7 +85,9 @@ class Network : public ClockedObject
virtual void makeExtInLink(NodeID src, SwitchID dest, BasicLink* link,
const NetDest& routing_table_entry) = 0;
virtual void makeInternalLink(SwitchID src, SwitchID dest, BasicLink* link,
- const NetDest& routing_table_entry) = 0;
+ const NetDest& routing_table_entry,
+ PortDirection src_outport,
+ PortDirection dst_inport) = 0;
virtual void collateStats() = 0;
virtual void print(std::ostream& out) const = 0;
diff --git a/src/mem/ruby/network/Topology.cc b/src/mem/ruby/network/Topology.cc
index f73e686c5..c18f379ae 100644
--- a/src/mem/ruby/network/Topology.cc
+++ b/src/mem/ruby/network/Topology.cc
@@ -88,6 +88,9 @@ Topology::Topology(uint32_t num_routers,
BasicRouter *router_src = int_link->params()->src_node;
BasicRouter *router_dst = int_link->params()->dst_node;
+ PortDirection src_outport = int_link->params()->src_outport;
+ PortDirection dst_inport = int_link->params()->dst_inport;
+
// Store the IntLink pointers for later
m_int_link_vector.push_back(int_link);
@@ -95,7 +98,7 @@ Topology::Topology(uint32_t num_routers,
int dst = router_dst->params()->router_id + 2*m_nodes;
// create the internal uni-directional link from src to dst
- addLink(src, dst, int_link);
+ addLink(src, dst, int_link, src_outport, dst_inport);
}
}
@@ -153,7 +156,9 @@ Topology::createLinks(Network *net)
}
void
-Topology::addLink(SwitchID src, SwitchID dest, BasicLink* link)
+Topology::addLink(SwitchID src, SwitchID dest, BasicLink* link,
+ PortDirection src_outport_dirn,
+ PortDirection dst_inport_dirn)
{
assert(src <= m_number_of_switches+m_nodes+m_nodes);
assert(dest <= m_number_of_switches+m_nodes+m_nodes);
@@ -164,6 +169,8 @@ Topology::addLink(SwitchID src, SwitchID dest, BasicLink* link)
src_dest_pair.first = src;
src_dest_pair.second = dest;
link_entry.link = link;
+ link_entry.src_outport_dirn = src_outport_dirn;
+ link_entry.dst_inport_dirn = dst_inport_dirn;
m_link_map[src_dest_pair] = link_entry;
}
@@ -199,7 +206,9 @@ Topology::makeLink(Network *net, SwitchID src, SwitchID dest,
link_entry = m_link_map[src_dest];
net->makeInternalLink(src - (2 * m_nodes), dest - (2 * m_nodes),
link_entry.link,
- routing_table_entry);
+ routing_table_entry,
+ link_entry.src_outport_dirn,
+ link_entry.dst_inport_dirn);
}
}
diff --git a/src/mem/ruby/network/Topology.hh b/src/mem/ruby/network/Topology.hh
index 7e0b12c63..1a5f4b19d 100644
--- a/src/mem/ruby/network/Topology.hh
+++ b/src/mem/ruby/network/Topology.hh
@@ -52,11 +52,14 @@ class NetDest;
class Network;
typedef std::vector<std::vector<int> > Matrix;
+typedef std::string PortDirection;
struct LinkEntry
{
BasicLink *link;
LinkDirection direction;
+ PortDirection src_outport_dirn;
+ PortDirection dst_inport_dirn;
};
typedef std::map<std::pair<SwitchID, SwitchID>, LinkEntry> LinkMap;
@@ -72,7 +75,9 @@ class Topology
void print(std::ostream& out) const { out << "[Topology]"; }
private:
- void addLink(SwitchID src, SwitchID dest, BasicLink* link);
+ void addLink(SwitchID src, SwitchID dest, BasicLink* link,
+ PortDirection src_outport_dirn = "",
+ PortDirection dest_inport_dirn = "");
void makeLink(Network *net, SwitchID src, SwitchID dest,
const NetDest& routing_table_entry);
diff --git a/src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.cc b/src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.cc
index 1e36a4cf0..9fd0c8669 100644
--- a/src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.cc
+++ b/src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.cc
@@ -175,7 +175,9 @@ GarnetNetwork_d::makeExtOutLink(SwitchID src, NodeID dest, BasicLink* link,
void
GarnetNetwork_d::makeInternalLink(SwitchID src, SwitchID dest, BasicLink* link,
- const NetDest& routing_table_entry)
+ const NetDest& routing_table_entry,
+ PortDirection src_outport,
+ PortDirection dst_inport)
{
GarnetIntLink_d* garnet_link = safe_cast<GarnetIntLink_d*>(link);
NetworkLink_d* net_link = garnet_link->m_network_links[0];
diff --git a/src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh b/src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh
index a11f3ea50..36a96e955 100644
--- a/src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh
+++ b/src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh
@@ -74,7 +74,9 @@ class GarnetNetwork_d : public BaseGarnetNetwork
void makeExtInLink(NodeID src, SwitchID dest, BasicLink* link,
const NetDest& routing_table_entry);
void makeInternalLink(SwitchID src, SwitchID dest, BasicLink* link,
- const NetDest& routing_table_entry);
+ const NetDest& routing_table_entry,
+ PortDirection src_outport,
+ PortDirection dst_inport);
//! Function for performing a functional write. The return value
//! indicates the number of messages that were written.
diff --git a/src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.cc b/src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.cc
index 0b33ab009..bc37c62c5 100644
--- a/src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.cc
+++ b/src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.cc
@@ -128,7 +128,9 @@ GarnetNetwork::makeExtOutLink(SwitchID src, NodeID dest, BasicLink* link,
void
GarnetNetwork::makeInternalLink(SwitchID src, SwitchID dest, BasicLink* link,
- const NetDest& routing_table_entry)
+ const NetDest& routing_table_entry,
+ PortDirection src_outport,
+ PortDirection dst_inport)
{
GarnetIntLink* garnet_link = safe_cast<GarnetIntLink*>(link);
NetworkLink *net_link = garnet_link->m_network_links[0];
diff --git a/src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.hh b/src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.hh
index 18360d475..6ffa06329 100644
--- a/src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.hh
+++ b/src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.hh
@@ -65,7 +65,9 @@ class GarnetNetwork : public BaseGarnetNetwork
void makeExtInLink(NodeID src, SwitchID dest, BasicLink* link,
const NetDest& routing_table_entry);
void makeInternalLink(SwitchID src, SwitchID dest, BasicLink* link,
- const NetDest& routing_table_entry);
+ const NetDest& routing_table_entry,
+ PortDirection src_outport,
+ PortDirection dst_inport);
//! Function for performing a functional read. The return value
//! indicates if a message was found that had the required address.
diff --git a/src/mem/ruby/network/simple/SimpleNetwork.cc b/src/mem/ruby/network/simple/SimpleNetwork.cc
index b30bd8731..1652ae7bb 100644
--- a/src/mem/ruby/network/simple/SimpleNetwork.cc
+++ b/src/mem/ruby/network/simple/SimpleNetwork.cc
@@ -104,7 +104,9 @@ SimpleNetwork::makeExtInLink(NodeID src, SwitchID dest, BasicLink* link,
// From a switch to a switch
void
SimpleNetwork::makeInternalLink(SwitchID src, SwitchID dest, BasicLink* link,
- const NetDest& routing_table_entry)
+ const NetDest& routing_table_entry,
+ PortDirection src_outport,
+ PortDirection dst_inport)
{
// Create a set of new MessageBuffers
std::vector<MessageBuffer*> queues(m_virtual_networks);
diff --git a/src/mem/ruby/network/simple/SimpleNetwork.hh b/src/mem/ruby/network/simple/SimpleNetwork.hh
index 6a325d2a4..8b870e735 100644
--- a/src/mem/ruby/network/simple/SimpleNetwork.hh
+++ b/src/mem/ruby/network/simple/SimpleNetwork.hh
@@ -64,7 +64,9 @@ class SimpleNetwork : public Network
void makeExtInLink(NodeID src, SwitchID dest, BasicLink* link,
const NetDest& routing_table_entry);
void makeInternalLink(SwitchID src, SwitchID dest, BasicLink* link,
- const NetDest& routing_table_entry);
+ const NetDest& routing_table_entry,
+ PortDirection src_outport,
+ PortDirection dst_inport);
void print(std::ostream& out) const;