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| author | Ron Dreslinski <rdreslin@umich.edu> | 2005-04-04 16:25:22 -0400 |
|---|---|---|
| committer | Ron Dreslinski <rdreslin@umich.edu> | 2005-04-04 16:25:22 -0400 |
| commit | 1b2c81b9d7835eb77b319e66bb8e0fb40f771b99 (patch) | |
| tree | 0d4f3d9c3d0f82af385313c7fa851718a72c6309 | |
| parent | a07340f6cd24817222c1b8905f8a33015322b6bd (diff) | |
| download | gem5-1b2c81b9d7835eb77b319e66bb8e0fb40f771b99.tar.xz | |
Add more prefetcher support.
SConscript:
Add GHB prefetcher to build list
python/m5/objects/BaseCache.mpy:
Add parameters about when to remove prefetches and wether or not to use cpuid to differentiate access patterns
--HG--
extra : convert_revision : 1d3fef21910f2f34b8c28d01b5f6e86eef53357c
| -rw-r--r-- | SConscript | 1 | ||||
| -rw-r--r-- | python/m5/objects/BaseCache.mpy | 4 |
2 files changed, 5 insertions, 0 deletions
diff --git a/SConscript b/SConscript index 7f9e56f70..37d697ca1 100644 --- a/SConscript +++ b/SConscript @@ -166,6 +166,7 @@ base_sources = Split(''' mem/cache/miss/mshr.cc mem/cache/miss/mshr_queue.cc mem/cache/prefetch/base_prefetcher.cc + mem/cache/prefetch/ghb_prefetcher.cc mem/cache/prefetch/prefetcher.cc mem/cache/prefetch/stride_prefetcher.cc mem/cache/prefetch/tagged_prefetcher.cc diff --git a/python/m5/objects/BaseCache.mpy b/python/m5/objects/BaseCache.mpy index 3727f2f01..214e0555c 100644 --- a/python/m5/objects/BaseCache.mpy +++ b/python/m5/objects/BaseCache.mpy @@ -54,3 +54,7 @@ simobj BaseCache(BaseMem): "Latency of the prefetcher") prefetch_policy = Param.Prefetch('none', "Type of prefetcher to use") + prefetch_cache_check_push = Param.Bool(True, + "Check if in cash on push or pop of prefetch queue") + prefetch_use_cpu_id = Param.Bool(True, + "Use the CPU ID to seperate calculations of prefetches") |