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| author | Kevin Lim <ktlim@umich.edu> | 2006-04-14 11:59:18 -0400 |
|---|---|---|
| committer | Kevin Lim <ktlim@umich.edu> | 2006-04-14 11:59:18 -0400 |
| commit | 20228000058fce5bae65fca6552c8021b82ab7de (patch) | |
| tree | 6471bc3f8591ff83723c4a1a8f3a1491e300d149 | |
| parent | 48f2626eaca40d4cf0b692f2ac8ec07eb5586516 (diff) | |
| download | gem5-20228000058fce5bae65fca6552c8021b82ab7de.tar.xz | |
Quick fix for the CPU not printing out the right address upon re-execution of a load that missed in the cache.
Split mem ops will solve this problem in the future.
--HG--
extra : convert_revision : 5bb921998aa0408d568030ef544b9905c4038bb2
| -rw-r--r-- | cpu/simple/cpu.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/cpu/simple/cpu.cc b/cpu/simple/cpu.cc index 6cef59796..85a38f99c 100644 --- a/cpu/simple/cpu.cc +++ b/cpu/simple/cpu.cc @@ -478,7 +478,7 @@ SimpleCPU::read(Addr addr, T &data, unsigned flags) } if (traceData) { - traceData->setAddr(addr); + traceData->setAddr(data_read_req->getVaddr()); } // @todo: Figure out a way to create a Fault from the packet result. |