diff options
author | Sean Wilson <spwilson2@wisc.edu> | 2017-06-28 11:55:34 -0500 |
---|---|---|
committer | Sean Wilson <spwilson2@wisc.edu> | 2017-07-12 20:07:05 +0000 |
commit | 381aa8498997f5ce93480511f7514be85356687a (patch) | |
tree | 750c3eff714caf2b0e6c99eebc825e2107e3948d | |
parent | 8bcf6a799d8bde90565fd42cf74ada0ec9fbc98f (diff) | |
download | gem5-381aa8498997f5ce93480511f7514be85356687a.tar.xz |
arm: Refactor some Event subclasses to lambdas
Change-Id: Ic59add8afee1d49633634272d9687a4b1558537e
Signed-off-by: Sean Wilson <spwilson2@wisc.edu>
Reviewed-on: https://gem5-review.googlesource.com/3929
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
-rw-r--r-- | src/dev/arm/gic_pl390.cc | 4 | ||||
-rw-r--r-- | src/dev/arm/gic_pl390.hh | 16 | ||||
-rw-r--r-- | src/dev/arm/vgic.cc | 11 | ||||
-rw-r--r-- | src/dev/arm/vgic.hh | 18 |
4 files changed, 17 insertions, 32 deletions
diff --git a/src/dev/arm/gic_pl390.cc b/src/dev/arm/gic_pl390.cc index 126431fe6..d2ec1d79b 100644 --- a/src/dev/arm/gic_pl390.cc +++ b/src/dev/arm/gic_pl390.cc @@ -87,7 +87,9 @@ Pl390::Pl390(const Params *p) cpuBpr[x] = GICC_BPR_MINIMUM; // Initialize cpu highest int cpuHighestInt[x] = SPURIOUS_INT; - postIntEvent[x] = new PostIntEvent(*this, x); + postIntEvent[x] = + new EventFunctionWrapper([this, x]{ postDelayedInt(x); }, + "Post Interrupt to CPU"); } DPRINTF(Interrupt, "cpuEnabled[0]=%d cpuEnabled[1]=%d\n", cpuEnabled[0], cpuEnabled[1]); diff --git a/src/dev/arm/gic_pl390.hh b/src/dev/arm/gic_pl390.hh index 60d9ae30d..58d84346d 100644 --- a/src/dev/arm/gic_pl390.hh +++ b/src/dev/arm/gic_pl390.hh @@ -353,21 +353,7 @@ class Pl390 : public BaseGic, public BaseGicRegisters */ void postDelayedInt(uint32_t cpu); - /** Event definition to post interrupt to CPU after a delay - */ - class PostIntEvent : public Event - { - private: - Pl390 &parent; - uint32_t cpu; - public: - PostIntEvent(Pl390 &_parent, uint32_t _cpu) - : parent(_parent), cpu(_cpu) - { } - void process() { parent.postDelayedInt(cpu); } - const char *description() const { return "Post Interrupt to CPU"; } - }; - PostIntEvent *postIntEvent[CPU_MAX]; + EventFunctionWrapper *postIntEvent[CPU_MAX]; int pendingDelayedInterrupts; public: diff --git a/src/dev/arm/vgic.cc b/src/dev/arm/vgic.cc index 6744ad513..cc8ad7788 100644 --- a/src/dev/arm/vgic.cc +++ b/src/dev/arm/vgic.cc @@ -53,7 +53,9 @@ VGic::VGic(const Params *p) maintInt(p->ppint) { for (int x = 0; x < VGIC_CPU_MAX; x++) { - postVIntEvent[x] = new PostVIntEvent(x, p->platform); + postVIntEvent[x] = new EventFunctionWrapper( + [this, x]{ processPostVIntEvent(x); }, + "Post VInterrupt to CPU"); maintIntPosted[x] = false; vIntPosted[x] = false; } @@ -369,6 +371,13 @@ VGic::unPostVInt(uint32_t cpu) } void +VGic::processPostVIntEvent(uint32_t cpu) +{ + platform->intrctrl->post(cpu, ArmISA::INT_VIRT_IRQ, 0); +} + + +void VGic::postMaintInt(uint32_t cpu) { DPRINTF(VGIC, "Posting maintenance PPI to GIC/cpu%d\n", cpu); diff --git a/src/dev/arm/vgic.hh b/src/dev/arm/vgic.hh index e9bc29c18..40e42d4fa 100644 --- a/src/dev/arm/vgic.hh +++ b/src/dev/arm/vgic.hh @@ -104,22 +104,10 @@ class VGic : public PioDevice static const uint32_t LR_PENDING = 1; static const uint32_t LR_ACTIVE = 2; - /** Event definition to post interrupt to CPU after a delay - */ - class PostVIntEvent : public Event - { - private: - uint32_t cpu; - Platform *platform; - public: - PostVIntEvent( uint32_t c, Platform* p) - : cpu(c), platform(p) - { } - void process() { platform->intrctrl->post(cpu, ArmISA::INT_VIRT_IRQ, 0);} - const char *description() const { return "Post VInterrupt to CPU"; } - }; + /** Post interrupt to CPU */ + void processPostVIntEvent(uint32_t cpu); - PostVIntEvent *postVIntEvent[VGIC_CPU_MAX]; + EventFunctionWrapper *postVIntEvent[VGIC_CPU_MAX]; bool maintIntPosted[VGIC_CPU_MAX]; bool vIntPosted[VGIC_CPU_MAX]; |