ruby: convert Topology to regular class

The Topology class in Ruby does not need to inherit from SimObject class.
This patch turns it into a regular class. The topology object is now created
in the constructor of the Network class. All the parameters for the topology
class have been moved to the network class.

7 files changed, 49 insertions, 98 deletions

diff --git a/configs/ruby/Ruby.py b/configs/ruby/Ruby.py
index 6859b044e..a11ff53c3 100644
--- a/configs/ruby/Ruby.py
+++ b/configs/ruby/Ruby.py
@@ -142,19 +142,12 @@ def create_system(options, system, piobus = None, dma_ports = []):
     # the controllers. Hence the separation between topology definition and
     # instantiation.
     #
-    # gem5 SimObject defined in src/mem/ruby/network/Network.py
-    net_topology = Topology()
-    net_topology.description = topology.description
 
     routers, int_links, ext_links = topology.makeTopology(options,
                                     IntLinkClass, ExtLinkClass, RouterClass)
-
-    net_topology.num_routers = len(routers)
-    net_topology.int_links = int_links
-    net_topology.ext_links = ext_links
-
-    network = NetworkClass(ruby_system = ruby, topology = net_topology,
-                           routers = routers)
+    network = NetworkClass(ruby_system = ruby, routers = routers,
+                           int_links = int_links, ext_links = ext_links,
+                           topology = topology.description)
 
     if options.network_fault_model:
         assert(options.garnet_network == "fixed")
diff --git a/src/mem/ruby/network/Network.cc b/src/mem/ruby/network/Network.cc
index c681dc5fe..c90f27c35 100644
--- a/src/mem/ruby/network/Network.cc
+++ b/src/mem/ruby/network/Network.cc
@@ -28,8 +28,8 @@
 
 #include "base/misc.hh"
 #include "mem/protocol/MachineType.hh"
+#include "mem/ruby/network/BasicLink.hh"
 #include "mem/ruby/network/Network.hh"
-#include "mem/ruby/network/Topology.hh"
 #include "mem/ruby/system/System.hh"
 
 uint32_t Network::m_virtual_networks;
@@ -40,20 +40,25 @@ Network::Network(const Params *p)
     : ClockedObject(p)
 {
     m_virtual_networks = p->number_of_virtual_networks;
-    m_topology_ptr = p->topology;
     m_control_msg_size = p->control_msg_size;
 
     // Total nodes/controllers in network
     // Must make sure this is called after the State Machine constructors
     m_nodes = MachineType_base_number(MachineType_NUM);
     assert(m_nodes != 0);
-
     assert(m_virtual_networks != 0);
-    assert(m_topology_ptr != NULL);
 
-    // Initialize the controller's network pointers
-    m_topology_ptr->initNetworkPtr(this);
+    m_topology_ptr = new Topology(p->routers.size(), p->ext_links,
+                                  p->int_links);
     p->ruby_system->registerNetwork(this);
+
+    // Initialize the controller's network pointers
+    for (std::vector<BasicExtLink*>::const_iterator i = p->ext_links.begin();
+         i != p->ext_links.end(); ++i) {
+        BasicExtLink *ext_link = (*i);
+        AbstractController *abs_cntrl = ext_link->params()->ext_node;
+        abs_cntrl->initNetworkPtr(this);
+    }
 }
 
 void
diff --git a/src/mem/ruby/network/Network.hh b/src/mem/ruby/network/Network.hh
index 9784af759..b0cca6806 100644
--- a/src/mem/ruby/network/Network.hh
+++ b/src/mem/ruby/network/Network.hh
@@ -44,17 +44,17 @@
 #include <string>
 #include <vector>
 
-#include "mem/packet.hh"
 #include "mem/protocol/LinkDirection.hh"
 #include "mem/protocol/MessageSizeType.hh"
 #include "mem/ruby/common/TypeDefines.hh"
+#include "mem/ruby/network/Topology.hh"
+#include "mem/packet.hh"
 #include "params/RubyNetwork.hh"
 #include "sim/clocked_object.hh"
 
 class NetDest;
 class MessageBuffer;
 class Throttle;
-class Topology;
 
 class Network : public ClockedObject
 {
@@ -62,6 +62,8 @@ class Network : public ClockedObject
     typedef RubyNetworkParams Params;
     Network(const Params *p);
     virtual ~Network() {}
+    const Params * params() const
+    { return dynamic_cast<const Params *>(_params);}
 
     virtual void init();
 
diff --git a/src/mem/ruby/network/Network.py b/src/mem/ruby/network/Network.py
index 1d2e8ed9d..40f01ca76 100644
--- a/src/mem/ruby/network/Network.py
+++ b/src/mem/ruby/network/Network.py
@@ -32,22 +32,18 @@ from m5.SimObject import SimObject
 from ClockedObject import ClockedObject
 from BasicLink import BasicLink
 
-class Topology(SimObject):
-    type = 'Topology'
-    cxx_header = "mem/ruby/network/Topology.hh"
-    description = Param.String("Not Specified",
-                               "the name of the imported topology module")
-    num_routers = Param.UInt32("Number of routers in the network")
-    ext_links = VectorParam.BasicExtLink("Links to external nodes")
-    int_links = VectorParam.BasicIntLink("Links between internal nodes")
-
 class RubyNetwork(ClockedObject):
     type = 'RubyNetwork'
     cxx_class = 'Network'
     cxx_header = "mem/ruby/network/Network.hh"
     abstract = True
-    number_of_virtual_networks = Param.Int(10, "");
-    topology = Param.Topology("");
-    control_msg_size = Param.Int(8, "");
-    ruby_system = Param.RubySystem("");
+    topology = Param.String("Not Specified",
+                            "the name of the imported topology module")
+
+    number_of_virtual_networks = Param.Int(10, "")
+    control_msg_size = Param.Int(8, "")
+    ruby_system = Param.RubySystem("")
+
     routers = VectorParam.BasicRouter("Network routers")
+    ext_links = VectorParam.BasicExtLink("Links to external nodes")
+    int_links = VectorParam.BasicIntLink("Links between internal nodes")
diff --git a/src/mem/ruby/network/Topology.cc b/src/mem/ruby/network/Topology.cc
index 58114d147..b8f6fb914 100644
--- a/src/mem/ruby/network/Topology.cc
+++ b/src/mem/ruby/network/Topology.cc
@@ -33,7 +33,6 @@
 #include "mem/protocol/MachineType.hh"
 #include "mem/ruby/common/NetDest.hh"
 #include "mem/ruby/network/BasicLink.hh"
-#include "mem/ruby/network/Network.hh"
 #include "mem/ruby/network/Topology.hh"
 #include "mem/ruby/slicc_interface/AbstractController.hh"
 
@@ -58,10 +57,10 @@ bool link_is_shortest_path_to_node(SwitchID src, SwitchID next,
 NetDest shortest_path_to_node(SwitchID src, SwitchID next,
     const Matrix& weights, const Matrix& dist);
 
-Topology::Topology(const Params *p)
-    : SimObject(p)
+Topology::Topology(uint32_t num_routers, vector<BasicExtLink *> ext_links,
+                   vector<BasicIntLink *> int_links)
+    : m_number_of_switches(num_routers)
 {
-    m_number_of_switches = p->num_routers;
 
     // initialize component latencies record
     m_component_latencies.resize(0);
@@ -72,18 +71,17 @@ Topology::Topology(const Params *p)
     m_nodes = MachineType_base_number(MachineType_NUM);
     assert(m_nodes > 1);
 
-    if (m_nodes != params()->ext_links.size() &&
-        m_nodes != params()->ext_links.size()) {
+    if (m_nodes != ext_links.size()) {
         fatal("m_nodes (%d) != ext_links vector length (%d)\n",
-              m_nodes, params()->ext_links.size());
+              m_nodes, ext_links.size());
     }
 
     // analyze both the internal and external links, create data structures
     // Note that the python created links are bi-directional, but that the
     // topology and networks utilize uni-directional links.  Thus each 
     // BasicLink is converted to two calls to add link, on for each direction
-    for (vector<BasicExtLink*>::const_iterator i = params()->ext_links.begin();
-         i != params()->ext_links.end(); ++i) {
+    for (vector<BasicExtLink*>::const_iterator i = ext_links.begin();
+         i != ext_links.end(); ++i) {
         BasicExtLink *ext_link = (*i);
         AbstractController *abs_cntrl = ext_link->params()->ext_node;
         BasicRouter *router = ext_link->params()->int_node;
@@ -102,8 +100,8 @@ Topology::Topology(const Params *p)
         addLink(int_idx, ext_idx2, ext_link, LinkDirection_Out);
     }
 
-    for (vector<BasicIntLink*>::const_iterator i = params()->int_links.begin();
-         i != params()->int_links.end(); ++i) {
+    for (vector<BasicIntLink*>::const_iterator i = int_links.begin();
+         i != int_links.end(); ++i) {
         BasicIntLink *int_link = (*i);
         BasicRouter *router_a = int_link->params()->node_a;
         BasicRouter *router_b = int_link->params()->node_b;
@@ -123,23 +121,6 @@ Topology::Topology(const Params *p)
 }
 
 void
-Topology::init()
-{
-}
-
-
-void
-Topology::initNetworkPtr(Network* net_ptr)
-{
-    for (vector<BasicExtLink*>::const_iterator i = params()->ext_links.begin();
-         i != params()->ext_links.end(); ++i) {
-        BasicExtLink *ext_link = (*i);
-        AbstractController *abs_cntrl = ext_link->params()->ext_node;
-        abs_cntrl->initNetworkPtr(net_ptr);
-    }
-}
-
-void
 Topology::createLinks(Network *net, bool isReconfiguration)
 {
     // Find maximum switchID
@@ -354,10 +335,3 @@ shortest_path_to_node(SwitchID src, SwitchID next, const Matrix& weights,
 
     return result;
 }
-
-Topology *
-TopologyParams::create()
-{
-    return new Topology(this);
-}
-
diff --git a/src/mem/ruby/network/Topology.hh b/src/mem/ruby/network/Topology.hh
index c3649bb83..11b1fe118 100644
--- a/src/mem/ruby/network/Topology.hh
+++ b/src/mem/ruby/network/Topology.hh
@@ -37,8 +37,8 @@
  * nodes. All edges have latency.
  */
 
-#ifndef __MEM_RUBY_NETWORK_SIMPLE_TOPOLOGY_HH__
-#define __MEM_RUBY_NETWORK_SIMPLE_TOPOLOGY_HH__
+#ifndef __MEM_RUBY_NETWORK_TOPOLOGY_HH__
+#define __MEM_RUBY_NETWORK_TOPOLOGY_HH__
 
 #include <iostream>
 #include <string>
@@ -46,9 +46,7 @@
 
 #include "mem/protocol/LinkDirection.hh"
 #include "mem/ruby/common/TypeDefines.hh"
-#include "mem/ruby/network/BasicRouter.hh"
-#include "params/Topology.hh"
-#include "sim/sim_object.hh"
+#include "mem/ruby/network/BasicLink.hh"
 
 class NetDest;
 class Network;
@@ -63,21 +61,14 @@ struct LinkEntry
 
 typedef std::map<std::pair<int, int>, LinkEntry> LinkMap;
 
-class Topology : public SimObject
+class Topology
 {
   public:
-    typedef TopologyParams Params;
-    Topology(const Params *p);
-    virtual ~Topology() {}
-    const Params *params() const { return (const Params *)_params; }
+    Topology(uint32_t num_routers, std::vector<BasicExtLink *> ext_links,
+             std::vector<BasicIntLink *> int_links);
 
-    void init();
-    int numSwitches() const { return m_number_of_switches; }
+    uint32_t numSwitches() const { return m_number_of_switches; }
     void createLinks(Network *net, bool isReconfiguration);
-
-    void initNetworkPtr(Network* net_ptr);
-
-    const std::string getName() { return m_name; }
     void print(std::ostream& out) const { out << "[Topology]"; }
 
   protected:
@@ -87,14 +78,8 @@ class Topology : public SimObject
                   const NetDest& routing_table_entry, 
                   bool isReconfiguration);
 
-    std::string getDesignStr();
-    // Private copy constructor and assignment operator
-    Topology(const Topology& obj);
-    Topology& operator=(const Topology& obj);
-
-    std::string m_name;
     NodeID m_nodes;
-    int m_number_of_switches;
+    uint32_t m_number_of_switches;
 
     std::vector<BasicExtLink*> m_ext_link_vector;
     std::vector<BasicIntLink*> m_int_link_vector;
@@ -103,7 +88,6 @@ class Topology : public SimObject
     Matrix m_component_inter_switches;
 
     LinkMap m_link_map;
-    std::vector<BasicRouter*> m_router_vector;
 };
 
 inline std::ostream&
@@ -114,4 +98,4 @@ operator<<(std::ostream& out, const Topology& obj)
     return out;
 }
 
-#endif // __MEM_RUBY_NETWORK_SIMPLE_TOPOLOGY_HH__
+#endif // __MEM_RUBY_NETWORK_TOPOLOGY_HH__
diff --git a/src/mem/ruby/network/garnet/BaseGarnetNetwork.cc b/src/mem/ruby/network/garnet/BaseGarnetNetwork.cc
index c6e770cc9..3b24ada49 100644
--- a/src/mem/ruby/network/garnet/BaseGarnetNetwork.cc
+++ b/src/mem/ruby/network/garnet/BaseGarnetNetwork.cc
@@ -46,17 +46,15 @@ BaseGarnetNetwork::BaseGarnetNetwork(const Params *p)
 
     // Currently Garnet only supports uniform bandwidth for all
     // links and network interfaces.
-    for (std::vector<BasicExtLink*>::const_iterator i = 
-             m_topology_ptr->params()->ext_links.begin();
-         i != m_topology_ptr->params()->ext_links.end(); ++i) {
+    for (std::vector<BasicExtLink*>::const_iterator i = p->ext_links.begin();
+         i != p->ext_links.end(); ++i) {
         BasicExtLink* ext_link = (*i);
         if (ext_link->params()->bandwidth_factor != m_ni_flit_size) {
             fatal("Garnet only supports uniform bw across all links and NIs\n");
         }
     }
-    for (std::vector<BasicIntLink*>::const_iterator i = 
-             m_topology_ptr->params()->int_links.begin();
-         i != m_topology_ptr->params()->int_links.end(); ++i) {
+    for (std::vector<BasicIntLink*>::const_iterator i =  p->int_links.begin();
+         i != p->int_links.end(); ++i) {
         BasicIntLink* int_link = (*i);
         if (int_link->params()->bandwidth_factor != m_ni_flit_size) {
             fatal("Garnet only supports uniform bw across all links and NIs\n");
@@ -187,4 +185,3 @@ BaseGarnetNetwork::printPerformanceStats(ostream& out) const
     out << "-------------" << endl;
     out << endl;
 }
-