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| author | Andreas Sandberg <andreas.sandberg@arm.com> | 2016-05-06 15:51:45 +0100 |
|---|---|---|
| committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2016-05-06 15:51:45 +0100 |
| commit | a46f77e6956244f293ad0acab049459b0f922b8e (patch) | |
| tree | f899d68d334fe589e51eab3b1fd6fc86e7e54d95 | |
| parent | fa5fda90c0a5860b31901fb783c1dcffbc9029b2 (diff) | |
| download | gem5-a46f77e6956244f293ad0acab049459b0f922b8e.tar.xz | |
arm: Update dts to work with the new HDLCD driver
The dts files in system/arm/dt currently assume that an (unreleased)
gem5-specific virtual encoder is used as a remote endpoint for the
HDLCD. This driver won't be released as a more general virtual encoder
is about to be posted on the Linux DRI devel list and this encoder has
now been merged with gem5's kernel tree. This changeset updates gem5's
dts files to use that encoder.
Change-Id: Ic1a1be728efd31603752fdfba005b6dbdea42e7e
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Rene De Jong <rene.dejong@arm.com>
| -rw-r--r-- | system/arm/dt/armv7.dts | 4 | ||||
| -rw-r--r-- | system/arm/dt/armv8.dts | 45 |
2 files changed, 32 insertions, 17 deletions
diff --git a/system/arm/dt/armv7.dts b/system/arm/dt/armv7.dts index 9bd5b39a1..aea48444b 100644 --- a/system/arm/dt/armv7.dts +++ b/system/arm/dt/armv7.dts @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015 ARM Limited + * Copyright (c) 2015-2016 ARM Limited * All rights reserved * * Redistribution and use in source and binary forms, with or without @@ -106,7 +106,7 @@ }; virt-encoder { - compatible = "gem5,hdlcd-virt-encoder"; + compatible = "drm,virtual-encoder"; port { hdlcd0_virt_input: endpoint@0 { remote-endpoint = <&hdlcd0_output>; diff --git a/system/arm/dt/armv8.dts b/system/arm/dt/armv8.dts index 0cb5a8513..9e07decbd 100644 --- a/system/arm/dt/armv8.dts +++ b/system/arm/dt/armv8.dts @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015 ARM Limited + * Copyright (c) 2015-2016 ARM Limited * All rights reserved * * Redistribution and use in source and binary forms, with or without @@ -108,25 +108,40 @@ #error Unsupported number of CPUs #endif }; + + virt-encoder { + compatible = "drm,virtual-encoder"; + port { + hdlcd0_virt_input: endpoint@0 { + remote-endpoint = <&hdlcd0_output>; + }; + }; + + display-timings { + native-mode = <&timing0>; + + timing0: timing_1080p60 { + /* 1920x1080-60 */ + clock-frequency = <148500000>; + hactive = <1920>; + vactive = <1080>; + hfront-porch = <148>; + hback-porch = <88>; + hsync-len = <44>; + vfront-porch = <36>; + vback-porch = <4>; + vsync-len = <5>; + }; + }; + }; }; &hdlcd0 { status = "ok"; - display-timings { - native-mode = <&timing0>; - - timing0: timing_1080p60 { - /* 1920x1080-60 */ - clock-frequency = <148500>; - hactive = <1920>; - vactive = <1080>; - hfront-porch = <148>; - hback-porch = <88>; - hsync-len = <44>; - vfront-porch = <36>; - vback-porch = <4>; - vsync-len = <5>; + port { + hdlcd0_output: endpoint@0 { + remote-endpoint = <&hdlcd0_virt_input>; }; }; }; |