inorder/alpha-isa: create eaComp object visible to StaticInst through ISA

Remove subinstructions eaComp/memAcc since unused in CPU Models. Instead, create eaComp that is visible from StaticInst object. Gives InOrder model capability of generating address without actually initiating access
* * *

5 files changed, 36 insertions, 218 deletions

diff --git a/src/arch/alpha/isa/mem.isa b/src/arch/alpha/isa/mem.isa
index 9a8503637..b74eaacab 100644
--- a/src/arch/alpha/isa/mem.isa
+++ b/src/arch/alpha/isa/mem.isa
@@ -44,27 +44,17 @@ output header {{
 
         /// Memory request flags.  See mem_req_base.hh.
         Request::Flags memAccessFlags;
-        /// Pointer to EAComp object.
-        const StaticInstPtr eaCompPtr;
-        /// Pointer to MemAcc object.
-        const StaticInstPtr memAccPtr;
 
         /// Constructor
-        Memory(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
-               StaticInstPtr _eaCompPtr = nullStaticInstPtr,
-               StaticInstPtr _memAccPtr = nullStaticInstPtr)
-            : AlphaStaticInst(mnem, _machInst, __opClass),
-              eaCompPtr(_eaCompPtr), memAccPtr(_memAccPtr)
+        Memory(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
+            : AlphaStaticInst(mnem, _machInst, __opClass)
         {
         }
 
         std::string
         generateDisassembly(Addr pc, const SymbolTable *symtab) const;
 
-      public:
-
-        const StaticInstPtr &eaCompInst() const { return eaCompPtr; }
-        const StaticInstPtr &memAccInst() const { return memAccPtr; }
+       public:
 
         Request::Flags memAccFlags() { return memAccessFlags; }
     };
@@ -80,10 +70,8 @@ output header {{
         int32_t disp;
 
         /// Constructor.
-        MemoryDisp32(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
-                     StaticInstPtr _eaCompPtr = nullStaticInstPtr,
-                     StaticInstPtr _memAccPtr = nullStaticInstPtr)
-            : Memory(mnem, _machInst, __opClass, _eaCompPtr, _memAccPtr),
+        MemoryDisp32(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
+            : Memory(mnem, _machInst, __opClass),
               disp(MEMDISP)
         {
         }
@@ -99,10 +87,8 @@ output header {{
     {
       protected:
         /// Constructor
-        MemoryNoDisp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
-                     StaticInstPtr _eaCompPtr = nullStaticInstPtr,
-                     StaticInstPtr _memAccPtr = nullStaticInstPtr)
-            : Memory(mnem, _machInst, __opClass, _eaCompPtr, _memAccPtr)
+        MemoryNoDisp(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
+            : Memory(mnem, _machInst, __opClass)
         {
         }
 
@@ -142,32 +128,6 @@ def template LoadStoreDeclare {{
      */
     class %(class_name)s : public %(base_class)s
     {
-      protected:
-
-        /**
-         * "Fake" effective address computation class for "%(mnemonic)s".
-         */
-        class EAComp : public %(base_class)s
-        {
-          public:
-            /// Constructor
-            EAComp(ExtMachInst machInst);
-
-            %(BasicExecDeclare)s
-        };
-
-        /**
-         * "Fake" memory access instruction class for "%(mnemonic)s".
-         */
-        class MemAcc : public %(base_class)s
-        {
-          public:
-            /// Constructor
-            MemAcc(ExtMachInst machInst);
-
-            %(BasicExecDeclare)s
-        };
-
       public:
 
         /// Constructor.
@@ -175,6 +135,8 @@ def template LoadStoreDeclare {{
 
         %(BasicExecDeclare)s
 
+        %(EACompDeclare)s
+
         %(InitiateAccDeclare)s
 
         %(CompleteAccDeclare)s
@@ -184,6 +146,10 @@ def template LoadStoreDeclare {{
 }};
 
 
+def template EACompDeclare {{
+    Fault eaComp(%(CPU_exec_context)s *, Trace::InstRecord *) const;
+}};
+
 def template InitiateAccDeclare {{
     Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const;
 }};
@@ -214,41 +180,18 @@ def template LoadStoreMemAccSize {{
     }
 }};
 
-def template EACompConstructor {{
-    /** TODO: change op_class to AddrGenOp or something (requires
-     * creating new member of OpClass enum in op_class.hh, updating
-     * config files, etc.). */
-    inline %(class_name)s::EAComp::EAComp(ExtMachInst machInst)
-        : %(base_class)s("%(mnemonic)s (EAComp)", machInst, IntAluOp)
-    {
-        %(constructor)s;
-    }
-}};
-
-
-def template MemAccConstructor {{
-    inline %(class_name)s::MemAcc::MemAcc(ExtMachInst machInst)
-        : %(base_class)s("%(mnemonic)s (MemAcc)", machInst, %(op_class)s)
-    {
-        %(constructor)s;
-    }
-}};
-
 
 def template LoadStoreConstructor {{
     inline %(class_name)s::%(class_name)s(ExtMachInst machInst)
-         : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
-                          new EAComp(machInst), new MemAcc(machInst))
+         : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
     {
         %(constructor)s;
     }
 }};
 
-
 def template EACompExecute {{
-    Fault
-    %(class_name)s::EAComp::execute(%(CPU_exec_context)s *xc,
-                                   Trace::InstRecord *traceData) const
+    Fault %(class_name)s::eaComp(%(CPU_exec_context)s *xc,
+                                  Trace::InstRecord *traceData) const
     {
         Addr EA;
         Fault fault = NoFault;
@@ -267,32 +210,6 @@ def template EACompExecute {{
     }
 }};
 
-def template LoadMemAccExecute {{
-    Fault
-    %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc,
-                                   Trace::InstRecord *traceData) const
-    {
-        Addr EA;
-        Fault fault = NoFault;
-
-        %(fp_enable_check)s;
-        %(op_decl)s;
-        %(op_rd)s;
-        EA = xc->getEA();
-
-        if (fault == NoFault) {
-            fault = xc->read(EA, (uint%(mem_acc_size)d_t&)Mem, memAccessFlags);
-            %(memacc_code)s;
-        }
-
-        if (fault == NoFault) {
-            %(op_wb)s;
-        }
-
-        return fault;
-    }
-}};
-
 
 def template LoadExecute {{
     Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
@@ -366,78 +283,6 @@ def template LoadCompleteAcc {{
 }};
 
 
-def template StoreMemAccExecute {{
-    Fault
-    %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc,
-                                   Trace::InstRecord *traceData) const
-    {
-        Addr EA;
-        Fault fault = NoFault;
-
-        %(fp_enable_check)s;
-        %(op_decl)s;
-        %(op_rd)s;
-        EA = xc->getEA();
-
-        if (fault == NoFault) {
-            %(memacc_code)s;
-        }
-
-        if (fault == NoFault) {
-            fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
-                              memAccessFlags, NULL);
-            if (traceData) { traceData->setData(Mem); }
-        }
-
-        if (fault == NoFault) {
-            %(postacc_code)s;
-        }
-
-        if (fault == NoFault) {
-            %(op_wb)s;
-        }
-
-        return fault;
-    }
-}};
-
-def template StoreCondMemAccExecute {{
-    Fault
-    %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc,
-                                   Trace::InstRecord *traceData) const
-    {
-        Addr EA;
-        Fault fault = NoFault;
-        uint64_t write_result = 0;
-
-        %(fp_enable_check)s;
-        %(op_decl)s;
-        %(op_rd)s;
-        EA = xc->getEA();
-
-        if (fault == NoFault) {
-            %(memacc_code)s;
-        }
-
-        if (fault == NoFault) {
-            fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
-                              memAccessFlags, &write_result);
-            if (traceData) { traceData->setData(Mem); }
-        }
-
-        if (fault == NoFault) {
-            %(postacc_code)s;
-        }
-
-        if (fault == NoFault) {
-            %(op_wb)s;
-        }
-
-        return fault;
-    }
-}};
-
-
 def template StoreExecute {{
     Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
                                   Trace::InstRecord *traceData) const
@@ -582,26 +427,6 @@ def template StoreCondCompleteAcc {{
 }};
 
 
-def template MiscMemAccExecute {{
-    Fault %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc,
-                                          Trace::InstRecord *traceData) const
-    {
-        Addr EA;
-        Fault fault = NoFault;
-
-        %(fp_enable_check)s;
-        %(op_decl)s;
-        %(op_rd)s;
-        EA = xc->getEA();
-
-        if (fault == NoFault) {
-            %(memacc_code)s;
-        }
-
-        return NoFault;
-    }
-}};
-
 def template MiscExecute {{
     Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
                                   Trace::InstRecord *traceData) const
@@ -700,9 +525,6 @@ def LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
     iop = InstObjParams(name, Name, base_class,
                         { 'ea_code':ea_code, 'memacc_code':memacc_code, 'postacc_code':postacc_code },
                         inst_flags)
-    ea_iop = InstObjParams(name, Name, base_class,
-                        { 'ea_code':ea_code },
-                        inst_flags)
     memacc_iop = InstObjParams(name, Name, base_class,
                         { 'memacc_code':memacc_code, 'postacc_code':postacc_code },
                         inst_flags)
@@ -719,7 +541,6 @@ def LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
     # corresponding Store template..
     StoreCondInitiateAcc = StoreInitiateAcc
 
-    memAccExecTemplate = eval(exec_template_base + 'MemAccExecute')
     fullExecTemplate = eval(exec_template_base + 'Execute')
     initiateAccTemplate = eval(exec_template_base + 'InitiateAcc')
     completeAccTemplate = eval(exec_template_base + 'CompleteAcc')
@@ -731,13 +552,10 @@ def LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
 
     # (header_output, decoder_output, decode_block, exec_output)
     return (LoadStoreDeclare.subst(iop),
-            EACompConstructor.subst(ea_iop)
-            + MemAccConstructor.subst(memacc_iop)
-            + LoadStoreConstructor.subst(iop),
+            LoadStoreConstructor.subst(iop),
             decode_template.subst(iop),
-            EACompExecute.subst(ea_iop)
-            + memAccExecTemplate.subst(memacc_iop)
-            + fullExecTemplate.subst(iop)
+            fullExecTemplate.subst(iop)
+            + EACompExecute.subst(iop)
             + initiateAccTemplate.subst(iop)
             + completeAccTemplate.subst(iop)
             + memAccSizeTemplate.subst(memacc_iop))
diff --git a/src/arch/alpha/isa/pal.isa b/src/arch/alpha/isa/pal.isa
index 0931c1aec..c6c0fa95c 100644
--- a/src/arch/alpha/isa/pal.isa
+++ b/src/arch/alpha/isa/pal.isa
@@ -155,9 +155,7 @@ output header {{
         int16_t disp;
 
         /// Constructor
-        HwLoadStore(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
-                    StaticInstPtr _eaCompPtr = nullStaticInstPtr,
-                    StaticInstPtr _memAccPtr = nullStaticInstPtr);
+        HwLoadStore(const char *mnem, ExtMachInst _machInst, OpClass __opClass);
 
         std::string
         generateDisassembly(Addr pc, const SymbolTable *symtab) const;
@@ -168,11 +166,8 @@ output header {{
 output decoder {{
     inline
     HwLoadStore::HwLoadStore(const char *mnem, ExtMachInst _machInst,
-                             OpClass __opClass,
-                             StaticInstPtr _eaCompPtr,
-                             StaticInstPtr _memAccPtr)
-        : Memory(mnem, _machInst, __opClass, _eaCompPtr, _memAccPtr),
-        disp(HW_LDST_DISP)
+                             OpClass __opClass)
+        : Memory(mnem, _machInst, __opClass), disp(HW_LDST_DISP)
     {
         memAccessFlags.clear();
         if (HW_LDST_PHYS) memAccessFlags.set(Request::PHYSICAL);
diff --git a/src/cpu/SConscript b/src/cpu/SConscript
index 344deb9cf..854db9f12 100644
--- a/src/cpu/SConscript
+++ b/src/cpu/SConscript
@@ -49,6 +49,8 @@ execfile(models_db.srcnode().abspath)
 # Template for execute() signature.
 exec_sig_template = '''
 virtual Fault execute(%(type)s *xc, Trace::InstRecord *traceData) const = 0;
+virtual Fault eaComp(%(type)s *xc, Trace::InstRecord *traceData) const
+{ panic("eaComp not defined!"); M5_DUMMY_RETURN };
 virtual Fault initiateAcc(%(type)s *xc, Trace::InstRecord *traceData) const
 { panic("initiateAcc not defined!"); M5_DUMMY_RETURN };
 virtual Fault completeAcc(Packet *pkt, %(type)s *xc,
@@ -59,6 +61,8 @@ virtual int memAccSize(%(type)s *xc)
 '''
 
 mem_ini_sig_template = '''
+virtual Fault eaComp(%(type)s *xc, Trace::InstRecord *traceData) const
+{ panic("eaComp not defined!"); M5_DUMMY_RETURN };
 virtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); M5_DUMMY_RETURN };
 '''
 
diff --git a/src/cpu/inorder/inorder_dyn_inst.cc b/src/cpu/inorder/inorder_dyn_inst.cc
index 7fc953da2..b6eac04cb 100644
--- a/src/cpu/inorder/inorder_dyn_inst.cc
+++ b/src/cpu/inorder/inorder_dyn_inst.cc
@@ -226,6 +226,13 @@ InOrderDynInst::execute()
 }
 
 Fault
+InOrderDynInst::calcEA()
+{
+    this->fault = this->staticInst->eaComp(this, this->traceData);
+    return this->fault;
+}
+
+Fault
 InOrderDynInst::initiateAcc()
 {
     // @todo: Pretty convoluted way to avoid squashing from happening
@@ -275,16 +282,9 @@ void InOrderDynInst::deleteStages() {
 }
 
 Fault
-InOrderDynInst::calcEA()
-{
-    return staticInst->eaCompInst()->execute(this, this->traceData);
-}
-
-Fault
 InOrderDynInst::memAccess()
 {
-    //return staticInst->memAccInst()->execute(this, this->traceData);
-    return initiateAcc( );
+    return initiateAcc();
 }
 
 void
diff --git a/src/cpu/inorder/pipeline_traits.cc b/src/cpu/inorder/pipeline_traits.cc
index eb899452a..1c17b0d3f 100644
--- a/src/cpu/inorder/pipeline_traits.cc
+++ b/src/cpu/inorder/pipeline_traits.cc
@@ -99,8 +99,8 @@ bool createBackEndSchedule(DynInstPtr &inst)
     if ( inst->isNonSpeculative() ) {
         // skip execution of non speculative insts until later
     } else if ( inst->isMemRef() ) {
-        E->needs(AGEN, AGENUnit::GenerateAddr);
         if ( inst->isLoad() ) {
+            E->needs(AGEN, AGENUnit::GenerateAddr);
             E->needs(DTLB, TLBUnit::DataLookup);
             E->needs(DCache, CacheUnit::InitiateReadData);
         }
@@ -121,6 +121,7 @@ bool createBackEndSchedule(DynInstPtr &inst)
         M->needs(DCache, CacheUnit::CompleteReadData);
     } else if ( inst->isStore() ) {
         M->needs(RegManager, UseDefUnit::ReadSrcReg, 1);
+        M->needs(AGEN, AGENUnit::GenerateAddr);
         M->needs(DTLB, TLBUnit::DataLookup);
         M->needs(DCache, CacheUnit::InitiateWriteData);
     }