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authorGabe Black <gblack@eecs.umich.edu>2007-07-24 15:37:16 -0700
committerGabe Black <gblack@eecs.umich.edu>2007-07-24 15:37:16 -0700
commit4bb1c5ba0c79b72b20b2ac9e196670011809819f (patch)
tree03c35ee7e6cb9cfc9dc2e02cb15b612690682c70
parent97c4258383e91b20ea76229a2f3c594fe81b0f60 (diff)
downloadgem5-4bb1c5ba0c79b72b20b2ac9e196670011809819f.tar.xz
Add a special case for "test" which needs an immediate even though everything else with it's opcode doesn't.
Also made some spacing consistent. --HG-- extra : convert_revision : 72a317f29c11705782e19840bef24354214d3143
-rw-r--r--src/arch/x86/predecoder.cc16
1 files changed, 13 insertions, 3 deletions
diff --git a/src/arch/x86/predecoder.cc b/src/arch/x86/predecoder.cc
index 295ca10a4..7f8bc7abc 100644
--- a/src/arch/x86/predecoder.cc
+++ b/src/arch/x86/predecoder.cc
@@ -311,9 +311,19 @@ namespace X86ISA
else
displacementSize = 0;
}
+
+ // The "test" instruction in group 3 needs an immediate, even though
+ // the other instructions with the same actual opcode don't.
+ if (emi.opcode.num == 1 && (modRM.reg & 0x6) == 0) {
+ if (emi.opcode.op == 0xF6)
+ immediateSize = 1;
+ else if (emi.opcode.op == 0xF7)
+ immediateSize = (emi.opSize == 8) ? 4 : emi.opSize;
+ }
+
//If there's an SIB, get that next.
//There is no SIB in 16 bit mode.
- if(modRM.rm == 4 && modRM.mod != 3) {
+ if (modRM.rm == 4 && modRM.mod != 3) {
// && in 32/64 bit mode)
nextState = SIBState;
} else if(displacementSize) {
@@ -339,9 +349,9 @@ namespace X86ISA
emi.sib = nextByte;
DPRINTF(Predecoder, "Found SIB byte %#x.\n", nextByte);
consumeByte();
- if(emi.modRM.mod == 0 && emi.sib.base == 5)
+ if (emi.modRM.mod == 0 && emi.sib.base == 5)
displacementSize = 4;
- if(displacementSize) {
+ if (displacementSize) {
nextState = DisplacementState;
} else if(immediateSize) {
nextState = ImmediateState;