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authorSteve Reinhardt <stever@eecs.umich.edu>2004-04-03 13:46:10 -0800
committerSteve Reinhardt <stever@eecs.umich.edu>2004-04-03 13:46:10 -0800
commit65205b82acee56b0034c0122d5f5a89f57c760fc (patch)
tree6492d870fa53ee592ca81cafef74e930254351b3
parentb3b0a4705b27a192226e6f97dc78b97eec73613d (diff)
downloadgem5-65205b82acee56b0034c0122d5f5a89f57c760fc.tar.xz
More {Itb,Dtb} -> {ITB,DTB} renames (forgot to test build KERNEL).
Also missed renames in a bunch of config files somehow. (See previous changeset for list of renames.) arch/alpha/alpha_memory.cc: arch/alpha/ev5.cc: arch/alpha/faults.hh: cpu/exec_context.cc: cpu/exec_context.hh: cpu/simple_cpu/simple_cpu.hh: More {Itb,Dtb} -> {ITB,DTB} renames (forgot to test build KERNEL). --HG-- extra : convert_revision : b2c6ca0916b72b59895520fcacaf028667560a0d
-rw-r--r--arch/alpha/alpha_memory.cc12
-rw-r--r--arch/alpha/ev5.cc10
-rw-r--r--arch/alpha/faults.hh10
-rw-r--r--cpu/exec_context.cc2
-rw-r--r--cpu/exec_context.hh6
-rw-r--r--cpu/simple_cpu/simple_cpu.hh6
6 files changed, 23 insertions, 23 deletions
diff --git a/arch/alpha/alpha_memory.cc b/arch/alpha/alpha_memory.cc
index 13cdb1d73..dea25a440 100644
--- a/arch/alpha/alpha_memory.cc
+++ b/arch/alpha/alpha_memory.cc
@@ -465,7 +465,7 @@ AlphaDTB::translate(MemReqPtr &req, bool write) const
req->xc);
if (write) { write_acv++; } else { read_acv++; }
- return Dtb_Fault_Fault;
+ return DTB_Fault_Fault;
}
// Check for "superpage" mapping: when SP<1> is set, and
@@ -480,7 +480,7 @@ AlphaDTB::translate(MemReqPtr &req, bool write) const
((write ? MM_STAT_WR_MASK : 0) | MM_STAT_ACV_MASK),
req->xc);
if (write) { write_acv++; } else { read_acv++; }
- return Dtb_Acv_Fault;
+ return DTB_Acv_Fault;
}
req->paddr = req->vaddr & PA_IMPL_MASK;
@@ -512,13 +512,13 @@ AlphaDTB::translate(MemReqPtr &req, bool write) const
(pte->fonw ? MM_STAT_FONW_MASK : 0),
req->xc);
write_acv++;
- return Dtb_Fault_Fault;
+ return DTB_Fault_Fault;
}
if (pte->fonw) {
fault(req->vaddr, MM_STAT_WR_MASK | MM_STAT_FONW_MASK,
req->xc);
write_acv++;
- return Dtb_Fault_Fault;
+ return DTB_Fault_Fault;
}
} else {
if (!(pte->xre & MODE2MASK(mode))) {
@@ -527,12 +527,12 @@ AlphaDTB::translate(MemReqPtr &req, bool write) const
(pte->fonr ? MM_STAT_FONR_MASK : 0),
req->xc);
read_acv++;
- return Dtb_Acv_Fault;
+ return DTB_Acv_Fault;
}
if (pte->fonr) {
fault(req->vaddr, MM_STAT_FONR_MASK, req->xc);
read_acv++;
- return Dtb_Fault_Fault;
+ return DTB_Fault_Fault;
}
}
}
diff --git a/arch/alpha/ev5.cc b/arch/alpha/ev5.cc
index 551cbdabf..9b3ac5fff 100644
--- a/arch/alpha/ev5.cc
+++ b/arch/alpha/ev5.cc
@@ -68,11 +68,11 @@ AlphaISA::fault_addr[Num_Faults] = {
0x0201, /* Ndtb_Miss_Fault */
0x0281, /* Pdtb_Miss_Fault */
0x0301, /* Alignment_Fault */
- 0x0381, /* Dtb_Fault_Fault */
- 0x0381, /* Dtb_Acv_Fault */
- 0x0181, /* Itb_Miss_Fault */
- 0x0181, /* Itb_Fault_Fault */
- 0x0081, /* Itb_Acv_Fault */
+ 0x0381, /* DTB_Fault_Fault */
+ 0x0381, /* DTB_Acv_Fault */
+ 0x0181, /* ITB_Miss_Fault */
+ 0x0181, /* ITB_Fault_Fault */
+ 0x0081, /* ITB_Acv_Fault */
0x0481, /* Unimplemented_Opcode_Fault */
0x0581, /* Fen_Fault */
0x2001, /* Pal_Fault */
diff --git a/arch/alpha/faults.hh b/arch/alpha/faults.hh
index bc8a4da0e..33aa55439 100644
--- a/arch/alpha/faults.hh
+++ b/arch/alpha/faults.hh
@@ -38,11 +38,11 @@ enum Fault {
Ndtb_Miss_Fault, // DTB miss
Pdtb_Miss_Fault, // nested DTB miss
Alignment_Fault, // unaligned access
- Dtb_Fault_Fault, // DTB page fault
- Dtb_Acv_Fault, // DTB access violation
- Itb_Miss_Fault, // ITB miss
- Itb_Fault_Fault, // ITB page fault
- Itb_Acv_Fault, // ITB access violation
+ DTB_Fault_Fault, // DTB page fault
+ DTB_Acv_Fault, // DTB access violation
+ ITB_Miss_Fault, // ITB miss
+ ITB_Fault_Fault, // ITB page fault
+ ITB_Acv_Fault, // ITB access violation
Unimplemented_Opcode_Fault, // invalid/unimplemented instruction
Fen_Fault, // FP not-enabled fault
Pal_Fault, // call_pal S/W interrupt
diff --git a/cpu/exec_context.cc b/cpu/exec_context.cc
index e7d3e0b91..a89cf4bb5 100644
--- a/cpu/exec_context.cc
+++ b/cpu/exec_context.cc
@@ -42,7 +42,7 @@ using namespace std;
// constructor
#ifdef FULL_SYSTEM
ExecContext::ExecContext(BaseCPU *_cpu, int _thread_num, System *_sys,
- AlphaItb *_itb, AlphaDtb *_dtb,
+ AlphaITB *_itb, AlphaDTB *_dtb,
FunctionalMemory *_mem)
: _status(ExecContext::Unallocated),
kernelStats(this, _cpu), cpu(_cpu), thread_num(_thread_num),
diff --git a/cpu/exec_context.hh b/cpu/exec_context.hh
index a72516ac7..f2f2c0879 100644
--- a/cpu/exec_context.hh
+++ b/cpu/exec_context.hh
@@ -124,8 +124,8 @@ class ExecContext
#ifdef FULL_SYSTEM
FunctionalMemory *mem;
- AlphaItb *itb;
- AlphaDtb *dtb;
+ AlphaITB *itb;
+ AlphaDTB *dtb;
System *system;
// the following two fields are redundant, since we can always
@@ -174,7 +174,7 @@ class ExecContext
// constructor: initialize context from given process structure
#ifdef FULL_SYSTEM
ExecContext(BaseCPU *_cpu, int _thread_num, System *_system,
- AlphaItb *_itb, AlphaDtb *_dtb, FunctionalMemory *_dem);
+ AlphaITB *_itb, AlphaDTB *_dtb, FunctionalMemory *_dem);
#else
ExecContext(BaseCPU *_cpu, int _thread_num, Process *_process, int _asid);
ExecContext(BaseCPU *_cpu, int _thread_num, FunctionalMemory *_mem,
diff --git a/cpu/simple_cpu/simple_cpu.hh b/cpu/simple_cpu/simple_cpu.hh
index 9edd66ab4..d634753b9 100644
--- a/cpu/simple_cpu/simple_cpu.hh
+++ b/cpu/simple_cpu/simple_cpu.hh
@@ -40,8 +40,8 @@
#ifdef FULL_SYSTEM
class Processor;
class Kernel;
-class AlphaItb;
-class AlphaDtb;
+class AlphaITB;
+class AlphaDTB;
class PhysicalMemory;
class RemoteGDB;
@@ -131,7 +131,7 @@ class SimpleCPU : public BaseCPU
System *_system,
Counter max_insts_any_thread, Counter max_insts_all_threads,
Counter max_loads_any_thread, Counter max_loads_all_threads,
- AlphaItb *itb, AlphaDtb *dtb, FunctionalMemory *mem,
+ AlphaITB *itb, AlphaDTB *dtb, FunctionalMemory *mem,
MemInterface *icache_interface, MemInterface *dcache_interface,
bool _def_reg, Tick freq);