summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorNathan Binkert <binkertn@umich.edu>2007-06-10 13:52:21 -0700
committerNathan Binkert <binkertn@umich.edu>2007-06-10 13:52:21 -0700
commit961f8382f6cb1473420ac82301d7173e878be69c (patch)
tree7976d4a8261a92dd78921e5a785b241e0c12c094
parentfc4ab050b4940138a4288c416f3bfa9dc442c7b6 (diff)
downloadgem5-961f8382f6cb1473420ac82301d7173e878be69c.tar.xz
Add a function to get a SimObject's memory mode and rework
the set memory mode code to only go through the change if it is necessary --HG-- extra : convert_revision : 28288227bb56b0a04d756776eaf0a4ff9e1f8c20
-rw-r--r--src/python/m5/SimObject.py7
-rw-r--r--src/python/m5/__init__.py15
-rw-r--r--src/python/swig/sim_object.i1
3 files changed, 17 insertions, 6 deletions
diff --git a/src/python/m5/SimObject.py b/src/python/m5/SimObject.py
index 42266a80e..f87e13732 100644
--- a/src/python/m5/SimObject.py
+++ b/src/python/m5/SimObject.py
@@ -722,6 +722,13 @@ class SimObject(object):
for child in self._children.itervalues():
child.resume()
+ def getMemoryMode(self):
+ if not isinstance(self, m5.objects.System):
+ return None
+
+ system_ptr = internal.sim_object.convertToSystemPtr(self._ccObject)
+ return system_ptr.getMemoryMode()
+
def changeTiming(self, mode):
if isinstance(self, m5.objects.System):
# i don't know if there's a better way to do this - calling
diff --git a/src/python/m5/__init__.py b/src/python/m5/__init__.py
index 06dc92bc6..a9206a474 100644
--- a/src/python/m5/__init__.py
+++ b/src/python/m5/__init__.py
@@ -190,17 +190,20 @@ def changeToAtomic(system):
if not isinstance(system, (objects.Root, objects.System)):
raise TypeError, "Parameter of type '%s'. Must be type %s or %s." % \
(type(system), objects.Root, objects.System)
- doDrain(system)
- print "Changing memory mode to atomic"
- system.changeTiming(internal.sim_object.SimObject.Atomic)
+ if system.getMemoryMode() != internal.sim_object.SimObject.Atomic:
+ doDrain(system)
+ print "Changing memory mode to atomic"
+ system.changeTiming(internal.sim_object.SimObject.Atomic)
def changeToTiming(system):
if not isinstance(system, (objects.Root, objects.System)):
raise TypeError, "Parameter of type '%s'. Must be type %s or %s." % \
(type(system), objects.Root, objects.System)
- doDrain(system)
- print "Changing memory mode to timing"
- system.changeTiming(internal.sim_object.SimObject.Timing)
+
+ if system.getMemoryMode() != internal.sim_object.SimObject.Timing:
+ doDrain(system)
+ print "Changing memory mode to timing"
+ system.changeTiming(internal.sim_object.SimObject.Timing)
def switchCpus(cpuList):
print "switching cpus"
diff --git a/src/python/swig/sim_object.i b/src/python/swig/sim_object.i
index b2af72c61..a1737c438 100644
--- a/src/python/swig/sim_object.i
+++ b/src/python/swig/sim_object.i
@@ -66,6 +66,7 @@ class System {
private:
System();
public:
+ SimObject::MemoryMode getMemoryMode();
void setMemoryMode(SimObject::MemoryMode mode);
};