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| author | Mitch Hayenga <mitch.hayenga@arm.com> | 2014-09-03 07:42:46 -0400 |
|---|---|---|
| committer | Mitch Hayenga <mitch.hayenga@arm.com> | 2014-09-03 07:42:46 -0400 |
| commit | afbae1ec95e94b6da441a0269dbd9359a7069e3d (patch) | |
| tree | d4d6b3cd23d0d95dbaa227bb9916be9b4a28e73a | |
| parent | 659bdc1a6b50ace4803d754ad982cd6a79b5695f (diff) | |
| download | gem5-afbae1ec95e94b6da441a0269dbd9359a7069e3d.tar.xz | |
x86: Flag instructions that call suspend as IsQuiesce
The o3 cpu relies upon instructions that suspend a thread context being
flagged as "IsQuiesce". If they are not, unpredictable behavior can occur.
This patch fixes that for the x86 ISA.
| -rw-r--r-- | src/arch/x86/isa/decoder/two_byte_opcodes.isa | 6 | ||||
| -rw-r--r-- | src/arch/x86/isa/microops/specop.isa | 3 |
2 files changed, 5 insertions, 4 deletions
diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa index fb3add4ac..eb395fce2 100644 --- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa @@ -141,13 +141,13 @@ }}, IsNonSpeculative); 0x01: m5quiesce({{ PseudoInst::quiesce(xc->tcBase()); - }}, IsNonSpeculative); + }}, IsNonSpeculative, IsQuiesce); 0x02: m5quiesceNs({{ PseudoInst::quiesceNs(xc->tcBase(), Rdi); - }}, IsNonSpeculative); + }}, IsNonSpeculative, IsQuiesce); 0x03: m5quiesceCycle({{ PseudoInst::quiesceCycles(xc->tcBase(), Rdi); - }}, IsNonSpeculative); + }}, IsNonSpeculative, IsQuiesce); 0x04: m5quiesceTime({{ Rax = PseudoInst::quiesceTime(xc->tcBase()); }}, IsNonSpeculative); diff --git a/src/arch/x86/isa/microops/specop.isa b/src/arch/x86/isa/microops/specop.isa index 854d3910f..77c459097 100644 --- a/src/arch/x86/isa/microops/specop.isa +++ b/src/arch/x86/isa/microops/specop.isa @@ -63,7 +63,8 @@ output header {{ MicroHalt(ExtMachInst _machInst, const char * instMnem, uint64_t setFlags) : X86MicroopBase(_machInst, "halt", instMnem, - setFlags | (ULL(1) << StaticInst::IsNonSpeculative), + setFlags | (ULL(1) << StaticInst::IsNonSpeculative) | + (ULL(1) << StaticInst::IsQuiesce), No_OpClass) { } |