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authorGiacomo Travaglini <giacomo.travaglini@arm.com>2017-12-18 15:06:51 +0000
committerGiacomo Travaglini <giacomo.travaglini@arm.com>2018-04-18 14:42:22 +0000
commit1c31181958b53971f5940b80678fa4646ddb6c12 (patch)
treed9539ff674ee2bbccd0706ac0e3cf35af09e986e
parentfcec1bf88c0f2e14f3c0c2dd59475757a7a6b00d (diff)
downloadgem5-1c31181958b53971f5940b80678fa4646ddb6c12.tar.xz
arch-arm: Adding MiscReg Priv (EL1) global flag
This patch introduces a single global flag for setting RW access permission at EL1 level, in either secure and non-secure mode. Change-Id: I35df66a73349044ca996b5c04c5a2476f3a7abdf Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/10042 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
-rw-r--r--src/arch/arm/isa.hh10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh
index c10a88a37..c8ae5c22d 100644
--- a/src/arch/arm/isa.hh
+++ b/src/arch/arm/isa.hh
@@ -199,6 +199,11 @@ namespace ArmISA
info[MISCREG_PRI_NS_WR] = v;
return *this;
}
+ chain privNonSecure(bool v = true) const {
+ privNonSecureRead(v);
+ privNonSecureWrite(v);
+ return *this;
+ }
chain privSecureRead(bool v = true) const {
info[MISCREG_PRI_S_RD] = v;
return *this;
@@ -212,6 +217,11 @@ namespace ArmISA
privSecureWrite(v);
return *this;
}
+ chain priv(bool v = true) const {
+ privSecure(v);
+ privNonSecure(v);
+ return *this;
+ }
chain hypRead(bool v = true) const {
info[MISCREG_HYP_RD] = v;
return *this;