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| author | Nilay Vaish <nilay@cs.wisc.edu> | 2012-01-23 11:33:52 -0600 |
|---|---|---|
| committer | Nilay Vaish <nilay@cs.wisc.edu> | 2012-01-23 11:33:52 -0600 |
| commit | 24c23009980a11dfba147fb4ed93329f4dcf4c0d (patch) | |
| tree | bba1acec6c459a1486b20726cd8375598073a712 | |
| parent | 63563c9df2eca46231768a448e981e8bb7856655 (diff) | |
| download | gem5-24c23009980a11dfba147fb4ed93329f4dcf4c0d.tar.xz | |
Config: Enable using O3 CPU and Ruby in SE mode
| -rw-r--r-- | configs/common/Simulation.py | 2 | ||||
| -rw-r--r-- | configs/example/se.py | 15 | ||||
| -rw-r--r-- | configs/ruby/MESI_CMP_directory.py | 4 |
3 files changed, 8 insertions, 13 deletions
diff --git a/configs/common/Simulation.py b/configs/common/Simulation.py index 434fe8369..07cc323f9 100644 --- a/configs/common/Simulation.py +++ b/configs/common/Simulation.py @@ -43,7 +43,7 @@ def setCPUClass(options): if options.cpu_type == "timing": class TmpClass(TimingSimpleCPU): pass elif options.cpu_type == "detailed": - if not options.caches: + if not options.caches and not options.ruby: print "O3 CPU must be used with caches" sys.exit(1) class TmpClass(DerivO3CPU): pass diff --git a/configs/example/se.py b/configs/example/se.py index 0935a21a3..572364482 100644 --- a/configs/example/se.py +++ b/configs/example/se.py @@ -164,20 +164,13 @@ if options.cpu_type == "detailed" or options.cpu_type == "inorder": process += [smt_process, ] smt_idx += 1 numThreads = len(workloads) - + if options.ruby: - if options.cpu_type == "detailed": - print >> sys.stderr, "Ruby only works with TimingSimpleCPU!!" + if not (options.cpu_type == "detailed" or options.cpu_type == "timing"): + print >> sys.stderr, "Ruby requires TimingSimpleCPU or O3CPU!!" sys.exit(1) - elif not options.cpu_type == "timing": - print >> sys.stderr, "****WARN: using Timing CPU since it's needed by Ruby" - - class CPUClass(TimingSimpleCPU): pass - test_mem_mode = 'timing' - FutureClass = None -else: - (CPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options) +(CPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options) CPUClass.clock = '2GHz' CPUClass.numThreads = numThreads; diff --git a/configs/ruby/MESI_CMP_directory.py b/configs/ruby/MESI_CMP_directory.py index 6671c307b..79de421bb 100644 --- a/configs/ruby/MESI_CMP_directory.py +++ b/configs/ruby/MESI_CMP_directory.py @@ -153,7 +153,9 @@ def create_system(options, system, piobus, dma_devices, ruby_system): cntrl_id = cntrl_count, directory = \ RubyDirectoryMemory(version = i, - size = dir_size), + size = dir_size, + use_map = + options.use_map), memBuffer = mem_cntrl, ruby_system = ruby_system) |